Status Reporting System
Structure of an SCPI
Status Register
MTD200 MPEG Test Decoder User Manual
The status reporting system (see Figure 5–4 on page 5–52) stores all information
on the current operating status of the instrument and on errors. The information
is stored in the status register and in the error queue. The contents of the status
registers and of the error queue can be queried via remote control.
The information is hierarchically structured. The topmost level is formed by the
Status Byte Register (STB) defined by IEEE 488.2 and the associated mask
register Service Request Enable (SRE). The STB receives its information from
the Standard Event Status Register (ESR), which is also defined in IEEE 488.2,
and the associated mask register Standard Event Status Enable (ESE) as well as
from the SCPI–defined STATus:OPERation and STATus:QUEStionable
registers, which contain detailed information on the instrument.
The output buffer contains the messages returned by the device to the controller.
It is not part of the status reporting system, but since it determines the value of
the MAV bits in the STB, it is also shown in Figure 5–4 on page 5–52.
Each SCPI register consists of five registers of 16 bit each and with different
functions (see Figure 5–3). The individual bits are independent of each other.
Each hardware status is assigned a bit number which is the same for all five
registers. Bit 4 of the STATus:OPERation register, for instance, is assigned in all
five registers to the "MEASuring" action. Bit 15 (the most-significant bit) is set
to zero in all SCPI status registers. Thus the contents of the registers can be
processed by the controller program as a positive integer.
15 14 13 12
15 14 13 12
15 14 13 12
15 14 13 12
&
&
&
&
15 14 13 12
Figure 5–3: Status Register model
register
3
2
1
0
register
3
2
1
0
register
3
2
1
0
register
3
2
1
0
&
&
&
&
register
3
2
1
0
Remote Control
to next higher register
Summary bit
& = logic AND
= logic OR of all bits
5–49
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