Detailed Signal/Pin Descriptions; Power Supply; Oscillator, Clock And Reset - NS USBN9603 Manual

Universal serial bus full speed node controller with enhanced dma support
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1.0 Signal/Pin Connection and Description

1.2 DETAILED SIGNAL/PIN DESCRIPTIONS

1.2.1

Power Supply

I/O
Name
NA
Vcc
Digital Power Supply (V
level as GND and then raised to the required V
to be set to their reset values, the clock generator to be reset and stalls the CLKOUT output for
14
2
XIN clock cycles. During this time, no internal register is accessible.
NA
GND
Digital Power Supply (GND)
NA
AGND Analog Power Supply (AGND)
NA
V3.3
Transceiver 3.3V Voltage Supply. This pin can be used as the internal 3.3V voltage regulator
output. The regulator is intended to power only the internal transceiver and one external pull-up.
An external 1 µF de-coupling capacitor is required on this pin. The voltage regulator output is dis-
abled upon reset. When the internal voltage regulator is left disabled, this pin must be used as a
3.3V supply input for the internal transceiver. This is the case during 3.3V operation.
1.2.2

Oscillator, Clock and Reset

I/O
Name
NA
XIN
Crystal Oscillator Input. Input for internal 24 MHz crystal oscillator circuit. A 24 MHz funda-
mental crystal may be used.
NA
XOUT
Crystal Oscillator Output
O
CLKOUT Clock Output. This programmable clock output may be disabled and configured for different
speeds via the Clock Configuration register. After a power-on reset and hardware reset (as-
sertion of RESET), a 4 MHz clock signal is output (there may be an initial phase discontinuity).
In the USBN9604, a hardware reset causes CLKOUT to stall for 2
internal DLL is synchronized to the external reference clock.
I
RESET
Reset. Active low, assertion of RESET indicates a hardware reset, which causes all registers
in the device to revert to their reset values.
In the USBN9604, the hardware reset action is identical to a power-on reset. Signal condition-
ing is provided on this input to allow use of a simple, RC power-on reset circuit.
Oscillator Circuit
The XIN and XOUT pins may be connected to make a 24 MHz closed-loop, crystal-controlled oscillator. Alternately, an ex-
ternal 24 MHz clock source may be used as the input clock for the device. The internal crystal oscillator uses a 24 MHz
fundamental crystal. See Table 1 for typical component values and Figure 1 for the crystal circuit. For a specific crystal,
please consult the manufacturer for recommended component values.
If an external clock source is used, it is connected to XIN. XOUT should remain unconnected. Stray capacitance and induc-
tance should be kept as low as possible in the oscillator circuit. Trace lengths should be minimized by positioning the crystal
and external components as close as possible to the XIN and XOUT pins.
Component
Crystal Resonator
Resistor R1
(Continued)
Description
). Power-on reset is detected when the input voltage is at the same
CC
Description
Table 1. Approximate Component Values
Parameters
Resonance Frequency
Type
Maximum Serial Resistance
Maximum Shunt Capacitance
Load Capacitance
7
level. The power-on reset causes all registers
cc
14
XIN clock cycles while the
Values
Tolerance
24 MHz
2500 ppm
(max)
AT-Cut
50 Ω
10 pF
20 pF
1 MΩ
±5%
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