Table of Contents
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1.0
1.1
CONNECTION DIAGRAMS ........................................................................................................ 6
1.2
DETAILED SIGNAL/PIN DESCRIPTIONS .................................................................................. 7
1.2.1
Power Supply ................................................................................................................ 7
1.2.2
Oscillator, Clock and Reset ........................................................................................... 7
1.2.3
USB Port ....................................................................................................................... 8
1.2.4
Microprocessor Interface ............................................................................................... 8
2.0
2.1
TRANSCEIVER ......................................................................................................................... 10
2.2
VOLTAGE REGULATOR (VREG) ............................................................................................. 10
2.3
SERIAL INTERFACE ENGINE (SIE) ......................................................................................... 10
2.4
ENDPOINT PIPE CONTROLLER (EPC) ................................................................................... 12
2.5
MICROCONTROLLER INTERFACE ......................................................................................... 12
3.0
3.1
NON-MULTIPLEXED MODE ..................................................................................................... 13
3.1.1
Standard Access Mode ............................................................................................... 14
3.1.2
Burst Mode .................................................................................................................. 14
3.1.3
User Registers ............................................................................................................. 14
3.2
MULTIPLEXED MODE .............................................................................................................. 15
4.0
4.1
STANDARD DMA MODE (DMA) ............................................................................................... 16
4.2
AUTOMATIC DMA MODE (ADMA) ........................................................................................... 17
5.0
5.1
OPERATING COMMANDS ....................................................................................................... 19
5.2
READ AND WRITE TIMING ...................................................................................................... 20
6.0
6.1
FUNCTIONAL STATES ............................................................................................................. 22
6.1.1
Line Condition Detection ............................................................................................. 22
6.1.2
Functional State Transition .......................................................................................... 22
6.2
ENDPOINT OPERATION .......................................................................................................... 24
6.2.1
Address Detection ....................................................................................................... 24
6.2.2
Transmit and Receive Endpoint FIFOs ....................................................................... 24
6.2.3
Programming Model .................................................................................................... 28
6.3
POWER SAVING MODES ........................................................................................................ 28
6.4
CLOCK GENERATION .............................................................................................................. 29
7.0
7.1
CONTROL REGISTERS ........................................................................................................... 30
7.1.1
Main Control Register (MCNTRL) ............................................................................... 30
3
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