Dma Support Timing - NS USBN9603 Manual

8.0 Device Characteristics

8.6 DMA SUPPORT TIMING

(3.0V< V < 5.5V, 0˚C < TA< +70˚C, unless otherwise specified)
CC
Symbol
t
Request High to ACK Low
RHAL
t
ACK Low to Write Low
ALWL
t
Write Pulse Width
WW
1 Write High to Request Low C
t
WRL
1
t
DMA Write Recovery
DWR
t
ACK low to Read Low
ALRL
t
Read Pulse Width
RW
1 Read High to Request Low C
t
RRL
1
t
DMA Read Recovery
DRR
1. The minimum value of this parameter is from the system perspective. This value can be used
as the maximum value from the device perspective.
The maximun value of this parameter is infinity.
2. If DMA transfer is not interrupted by read or write. If the transfer is interrupted, two additional
MCLK cycles are used.
.
.
(Continued)
Parameter Conditions
C = 50 pF
L
C = 50 pF
L
C = 50 pF
L
= 50 pF
L
C = 50 pF
2
L
C = 50 pF
L
C = 50 pF
L
= 50 pF
L
C = 50 pF
2
L
DRQ
t
RHAL
DACK
t
WR
D7-0
Figure 29. DMA Write to USBN9603/4
DRQ
t
DACK
RD
D7-0
Figure 30. DMA Read from USBN9603/4
Min Typ
0
0
1/CKI
2/MCLK
2/MCLK
0
1/CKI
2/MCLK
2/MCLK
t t
ALWL WW WRL
Input
RHAL
t t t
ALRL RW RRL
Output
57
Max Units
nS
nS
nS
nS
nS
nS
nS
nS
nS
t
DWR
t
DRR
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