Advantech ARK-5420 Series User Manual page 73

Intel 3rd generation core i processor based fanless system with pcie x 4 & pci slot
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outportb(0xeb, 0);//IO
occupies. Write a value to this port can realize delay func-
tion. You can also choose other method according to the real
situation.
}
}
**************************************************************
**********
GPIO Simcodes
(Here GPIO 00 and GPIO 07 in Chapter 2 are taken as examples)
Output High to GPIO 00:
data = smbus_read_byte(0x40, 0x03);//
register 3 byte
data &= 0xfe;//bit 0 is set as 0
smbus_write_byte(0x40, 0x03, data)//Write back. GPIO 00
is set for output
data = smbus_read_byte(0x40, 0x01)//Read
register 1
data |= 0x01;//bit 0 is set as 1 which stands for high
smbus_write_byte(0x40, 0x01, data)//Write
high value
Read Input Value from GPIO 07:
data = smbus_read_byte(0x40, 0x03);//Read
register 3 byte
data |= 0x80;//bit 7??1
smbus_write_byte(0x40, 0x03, data)//Write back. GPIO 07
is set for input
data = smbus_read_byte(0x40, 0x00)//Read
register 0. Then, the response value of bit 7 should know
whether the input is low or high
port
0xeb
Read
61
No
real
device
slave
0x40
slave
0x40
back.
Output
slave
0x40
slave
0x40
ARK-5420 User Manual

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