Ark-5420 Digital Dio Definition; Configuration Sequence - Advantech ARK-5420 Series User Manual

Intel 3rd generation core i processor based fanless system with pcie x 4 & pci slot
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Please carefully read and study the below screenshots and source codes in blue.
Please download programming specifications for the PCA955 NXP semiconductor.
6.1

ARK-5420 Digital DIO Definition

See Section 2.3.6.
6.2

Configuration Sequence

ARK-5420's GPIO is realized through PCA9554 GPIO IC connected to ICH SMBUS.
Therefore, the configuration and access to GPIO IC is completed by IO Space
accessing ICH SMBUS controller.
Below is the diagram of ICH SMBUS IO Space:
SMB_BASE + Offset Mnemonic
00h
02h
03h
04h
05h
06h
For ARK-5420, IO address of the above SMB_BASE is 0xF040.
The detailed SMBUS IO control access code, please refer to Chapter 3.
The corresponding SMBUS slave address of PCA9554 of GPIO 00 - GPIO 07 on
ARK-5420 is 0x40 (8bit address):
GPIO 00 – GPIO 07: PCA9554 0x40 (IO0 – IO7)
Below are pinouts for PCA9554:
Table 6.1: Pin Description
Symbol
Pin
DIP16, SO16,
SSOP16, TSSOP16
A0
1
A1
2
A2
3
IO0
4
IO1
5
IO2
6
IO3
7
V
8
SS
IO4
9
IO5
10
IO6
11
IO7
12
INT
13
ARK-5420 User Manual
Register Name
HST_STS
Host Status
HST_CNT
Host Control
HST_CMD
Host Command
Transmit Slave
XMIT_SLVA
Address
HST_D0
Host Data 0
HST_D1
Host Data 1
HVQFN16
15
16
1
2
3
4
5
6
7
8
9
10
11
54
Default
Type
R/WC, RO, R/WC
00h
(special)
00h
R/W, WO R/W
00h
R/W
00h
R/W
00h
R/W
00h
R/W
Description
SSOP20
6
address input 0
7
address input 1
9
address input 2
10
input/output 0
11
input/output 1
12
input/output 2
14
input/output 3
15
supply ground
16
input/output 4
17
input/output 5
19
input/output 6
20
input/output 7
interrupt output (open-
1
drain)

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