Function Call For Reference - Advantech ARK-5420 Series User Manual

Intel 3rd generation core i processor based fanless system with pcie x 4 & pci slot
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Example:
Take ARK-5420 as an example. Assume GPIO 00 is set as Output and GPIO 7 is set
as Input, with two pins interconnected, how to set the corresponding register? GPIO
00 corresponds to PCA9554 0x40 IO0, while GPIO 07 corresponds to PCA9554
0x40 IO7.
Set GPIO 00 as Output:
1.
Read SMBUS slave 0x40 register 3 byte value;
2.
Set bit 0 of the value read in step 1 as 0 and write it to SMBUS slave 0x40 regis-
ter 3;
3.
Read SMBUS slave 0x40 register 1 byte value;
4.
Set bit 0 of the value read in step 3 as 0 or 1 according to low or high of the out-
put value, then write it back to SMBUS slave 0x40 register 1.
Set GPIO 07 as Input:
1.
Read SMBUS slave 0x40 register 3 byte value;
2.
Set bit 7 of the value read in step 1 as 1 and write it to SMBUS slave 0x40 regis-
ter 3;
3.
Read SMBUS slave 0x40 register 0 byte value;
4.
Decide low or high of the input value through bit7 value read in step3.
6.3

Function Call for Reference

ICH SMBUS Access Code
(The following code is realized by simulating the access of BIOS to SMBUS. It uses
Borand C++ 3.1 for compiling and is successfully tested under DOS (So far, it is not
tested under other OS).
#define SMBUS_PORT 0xF040//SMB_BASE?0xF040
typedefunsigned char BYTE;
//////////////////////////////////////////////////////////////
///////////////////////////////////////
BYTE
smbus_read_byte(BYTE addr, BYTE offset)
// Read SMBUS Register byte value. Read one byte value each
time. addr is slave address (such as 0x40), and offset is
register offset.
{
int i;
BYTE data;
outportb(SMBUS_PORT + 4, (addr | 1));//
address to SMB_BASE + 4 (When reading, bit 0 of slave address
should be set as 1, so here
newiodelay();//delay
newiodelay();//delay
chk_smbus_ready();// Whether SMBUS is ready
addr|1 is available)
57
Write
slave
ARK-5420 User Manual

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