Nexcom PEAK 6320A User Manual page 51

Single board computer
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PEAK 6320A User's Guide
SDRAM CAS latency Time
You can select CAS latency time in HCLKs of 2/2 or 3/3. The system board designer
should set the values in this field, depending on the DRAM installed. Do not change the
values in this field unless you change specifications of the installed DRAM or the
installed CPU.The choice: 2, 3.
DRAM Data Integrity Mode
Select Parity or ECC (error-correcting code), according to the type of installed DRAM.
The Choice: Non-ECC, ECC.
System BIOS Cacheable
Select Enabled allows caching of the system BIOS ROM at F000h-FFFFFh, resulting in
better system performance. However, if any program writes to this memory area, a
system error may result.
Enabled
BIOS access cached
Disabled
BIOS access not cached
Video BIOS Cacheable
Select Enabled allows caching of the video BIOS ROM at C0000h-F7FFFh, resulting in
better video performance. However, if any program writes to this memory area, a system
error may result.
Enabled
Video BIOS access cached
Disabled
Video BIOS access not cached
Video RAM Cacheable
Select Enabled allows caching of the video RAM , resulting in better system
performance. However, if any program writes to this memory area, a system error may
result.
8 Bit I/O Recovery Time
The recovery time is the length of time, measured in CPU clocks, which the system will
delay after the completion of an input/output request. This delay takes place because
the CPU is operating so much faster than the input/output bus that the CPU must be
BIOS Setup
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