Offset
0xF1000208
IDs 0-9 are in bits 28 to 31. Refer to the following table for code. Default timebase is
20µs.
This means that the integration time can be changed in 20 µs increments with the
shutter control.
Timebase should only be changed when the camera is in idle state and becomes active
only after setting the shutter value.
The ABSOLUTE VALUE CSR register, introduced in IIDC v. 1.3 is not implemented.
9.2.4
Extended shutter
The exposure time for long-term integration of up to 67 sec (SW 0.84 and FPGA FW
0.14) can be extended via the EXTENDED_SHUTTER register.
Offset
0xF100020C
The longest exposure time, 3FFFFFFh, corresponds to 67.11 sec.
Exposure times entered via the 81Ch register are mirrored in the extended register,
but not vice versa.
9.2.5
Test images
Bits 8-14 indicate which test images are saved. Setting bits "28-31" activates or
deactivates existing test images.
Name
TIMEBASE
ID Timebase
0
1
µs
1
2
µs
2
5
µs
3
10
µs
4
20
µs
Name
EXTD_SHUTTER
Field
Bit
Presence_Inq
[0]
---
[1..27]
Timebase_ID
[28..31]
ID
Timebase
5
50
6
100
7
200
8
500
9
1000
Field
Bit
Presence_Inq
[0]
---
[1.. 5]
ExpTime
[6..31]
Description
Indicates presence
of this feature (read
only)
µs
µs
µs
µs
µs
Description
Indicates presence of
this feature (read
only)
Exposure time in us
61
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