Contents Safety instructions....................6 Environmental conditions ................6 Device type and range of application............... 7 System components ...................7 Specifications......................9 F-201B.....................9 F-201C ....................10 Spectral sensitivity .................. 11 Quick start ......................12 Camera dimensions ....................13 Camera interfaces ....................14 IEEE-1394 port pin assignment..............15 HiRose jack pin assignment...............
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Binning....................42 8.2.1 Vertical binning ..................43 8.2.2 Horizontal binning................... 43 8.2.3 Full binning .................... 43 Frame rates..................... 44 How does bandwidth affect the frame rate?..........47 Test images .................... 48 Configuration of the camera ................. 50 Implemented registers ................54 9.1.1 Camera initialize register ................
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Before operation We place the highest demands for quality on our cameras. This manual should help you with the installation and setting up the camera for use. Please read through the manual carefully before operating the camera. Legal notice For customers in the U.S.A. This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to Part 15 of the FCC Rules.
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Technologies are brands protected by law. Warranty The information supplied by Allied Vision Technologies is supplied without any guarantees or warranty whatsoever, be it specific or implicit. Also excluded are all implicit warranties concerning the negotiability, the suitability for specific applications or the non-breaking of laws and patents.
Conventions used in this manual In order to give this manual in an easily understood layout and to emphasize important information, the following typographical styles and symbols are used: Styles Style Function Example Courier Programs, inputs, “Input” etc. upper case Register REGISTER italics...
Device type and range of application The AVT F-201 is an IEEE 1394 UXGA+ camera. Equipped with a 2 megapixel 1,8” progressive CCD sensor, it features a modular concept, large internal storage and a variety of intelligent preprocessing options. Among these are real time shading correction and up to 63 user-defined lookup tables. The AVT DOLPHIN F-201 is also suitable for all imaginable image processing tasks, especially due to its high full frame speed of up to 12,75 fps.
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This can be obtained from Allied Vision Technologies. A free demo version of “FireView” is available for download at www.alliedvisiontec.com. Of course the camera also works with all IIDC (formerly DCAM) compatible IEEE 1394 programs and image processing libraries. AVT offers different lenses from a variety of manufacturers. The following table lists selected image formats depending on distance and the focal width of the lens.
Specifications F-201B Spezifikation Image Device 1/1,8” Type progressive scan b/w SONY IT CCD Effective Picture Elements 1628 (H) x 1236 (V) Lens Mount C-Mount Picture Sizes 640 x 480 Pixel (Format_0; Mode_5 ) 800 x 600 Pixel (Format_1; Mode_2) 1024 x 768 ((Format_1; Mode_5) 1280 x 960 (Format_2;...
F-201C Spezifikation Image Device 1/1,8” Type progressive scan b/w SONY IT CCD Effective Picture Elements 1628 (H) x 1236 (V) Lens Mount C-Mount Picture Sizes 320 x 240 Pixel (Format_0; Mode_1) 640 x 480 Pixel (Format_0; Mode_2,3,5) 800 x 600 Pixel (Format_1; Mode_0,2) 1024 x 768 ((Format_1;...
Spectral sensitivity Figure 1 Spectral sensitivity F-201B without cut filter and without optics. Figure 2 Spectral sensitivity F-201C without cut filter and without optics.
Quick start To hook up an IEEE-1394 camera you need a PC with an IEEE-1394 port and appropriate software. The port is already present in many PCs and laptops. Should this not be the case, you can upgrade by installing one or more IEEE-1394 ports in the form of a card for the PCI slot or as a PC card (PCMCIA) for the PC card slot.
Figure 4 Directcontrol Camera dimensions Body size (normal model) 115 x 45 x 45 (offset lens) 140 x 62 x 45 Weight 225g Figure 5 normal body Figure 6 body with offset lens...
Figure 7 Optional tripod adapter Camera interfaces In addition to the status LEDs, both jacks are located on the back of the camera. The HiRose jack provides different control inputs and outputs The IEEE-1394 jack with lock- in mechanism provides access to the IEEE-1394 bus and thus makes it possible to control the camera and output frames.
IEEE-1394 port pin assignment The IEEE-1394 plug is suitable for industrial use and has the following pin assignment as per specification: Signal Signal Cable TPB+ Power Cable GND TPA- TPB- TPA+ Figure 9 IEEE 1394 plug (view of plug) HiRose jack pin assignment The HiRose plug is also suitable for industrial use and in addition to providing access to the inputs and outputs on the camera, connects the camera to a power supply.
6.3.2 LEDs 1 and 2 The following states are displayed via the LEDs: Com/S1 asynchronous and isochronous data transmission active (indicated asynchronously to transmission over the 1394 bus) Trg/S2 LED on – waiting for external trigger LED off – receiving external trigger Blink codes are used to signal warnings or error states: Class S1 Warning...
Input voltage of 12V is recommended to make most efficient use of the camera. The camera does not supply voltage to the FireWire™ bus if it is being receiving power via the HiRose plug. Control and video data signals The camera has 3 inputs and 3 outputs. These can be configured via matching registers (see section 9.2.10 Input/Output pin control).
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All functions are listed in the following table Function Input 1 Input 2 Input 3 Trigger Incremental decoder INC0 INC1 INC Rst Input Input Polarity Funktion Opto- Input Signal Trigger koppler Inc. In Input Input State Figure 13 Block diagram of the inputs Triggers All inputs configured as triggers are linked by AND.
Incremental decoder The decoder consists of a 12 bit counter. The counter uses the 3 hardware inputs. Trigger Value INC0 Counter w. INC1 Direction IncTrigger Comparator Detection INC Rst Figure 15 Incremental decoder Input 1 is used for counting, input 2 for detecting the direction of rotation and input 3 for the reset signal.
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Max. collector voltage 500 mA Max. collector emitter voltage 45 V Depending on the voltage applied a resistor may have to be switched in series (see diagram). Voltage above 45 V can damage the circuit. Output features are configured by software. Any signal can be placed on any output.
6.5.3 Pixel Data Pixel data are transmitted as isochronous data packets in accordance with the 1394 interface described in IIDC v. 1.3. The first packet of a frame is identified by the „1“ in the sync bit (sy) of the packet header. Figure 19 Isochronous data block packet format: Source: IIDC v.
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Figure 21 Y8 and Y16 format: Source: IIDC v. 1.3 specification Figure 22 Data structure: Source: IIDC v. 1.3 specification...
Time response The following sections describe time response of the camera using a single frame (OneShot) command. As set out in the IIDC specification, this is a software command that causes the camera to grab and transmit a single frame. 6.6.1 OneShot command on the bus to start of exposure The following values apply only under the condition that the camera is idle and ready...
6.6.3 Exposure time The exposure time is based on the following formula: Register value x Timebase + Offset The register value is the value set in the corresponding IIDC register (SHUTTER [81Ch]). This number which lies in the range between 1 and 4095. The Shutter register value is multiplied by the Time base register value (see TIMEBASE).
White balance The color cameras have both manual and automatic white balance, that can be set via the analog red and blue gain in the 0...+10 dB range. White balance is used so that non colored image parts are displayed non colored. These settings are made in register 80C of IIDC v.
Pause image capture 6 frames are always recorded Capture image via One_Shot Repeat steps 2 to 3 6 times Calculate and set correction values Start image capture again if necessary Figure 24 Automatic white balance sequence Finally, the calculated correction values can be read from the WHITE_BALANCE register. Manually setting gain The following ranges can be used when manually setting the gain for the analog video signal:...
Increments are in ¼ LSB (8 bit). The formula for gain and offset setting is: Y`= GxY+0 Lookup tables (LUT) The camera provides support for up to 63 user-defined LUTs. An additional lookup table is used for implementing gamma correction. The lookup tables convert the 12 bits from the digitizer to 8 bits.
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Loading a LUT into the camera Loading is done through the GPDATA_BUFFER data exchange buffer. Because the buffer can hold only a maximum of 2 kB and is smaller than a complete LUT at 4096 x 16 bit (8 kB), writing must take place in several steps: Limits query Read from registers LUT_INFO...
Shading correction Shading correction is used to compensate for inhomongeneities caused by lighting or optical characteristics within specified ranges. To correct a frame, a multiplier from 1...2 is calculated for each pixel in 1/256 steps – this allows for shading to be compensated by up to 50%.
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How to proceed: Set GrabCount to number of frames used to calculate shading image BuildImage to "true" Poll SHGD_Control register until Busy and BuildImage flags have been reset automatically Figure 27 automatic generation of a shading image The maximum value of GRAB_COUNT depends on the type of camera and the number of existing frame buffers.
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data is removed from the source image, keeping it from being contained in the shading image. Source image set unfocused Shading corrected output image (unfocused lens) After the lens has been focused again you see the previous image, but now with a considerably more uniform gradient.
Loading a shading image into the camera GPDATA_BUFFER is used to load a shading image into the camera. Because the size of a shading image is larger than GPDATA_BUFFER input must be handled in several steps: Limits query Read registers SHDG_INFO and GPDA-TA_INFO AddrOffset...
Interpolation (BAYER demosaicing) In interpolation a red, green or blue value is determined for each pixel. Only two lines are used for this simple interpolation: Input: Output: Figure 30 Interpolation green green green blue blue blue Color cameras begin outputting the image in line two and finish in line Y (maximum image height minus two).
Controlling image capture The camera supports the SHUTTER_MODES specified in IIDC v. 1.3. Each mode can be combined with an external trigger. In this case individual images are recorded when an external trigger impulse is present. 7.8.1 OneShot The camera can record an image by setting “OneShot” in the 61Ch register. This bit is automatically cleared after the image is captured.
Thus, a maximum delay of 63.27 µs can occur. FVal Zustand F-201B F-201C 100 ns 100 ns high 63,27 µs 63,27 µs Jitter at the beginning of exposure has no effect on the length of exposure time, i.e. it is always constant. Sequence mode The camera enables certain image settings to be set differently for a succession of images.
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on/off to "true" Set number of frames in Seq_Length Example: To set exposure time the value ImageNo = 0 you want is entered into the Extended shutter register Assign image properties in corresponding registers ApplyParameters = 1 Repeat steps 4 to 6 Increase ImageNo Start sequence in...
If sequence mode is quitted, the camera can use the FIFO for other tasks. For this reason, a sequence must be loaded back into the camera after sequence mode has been quit. 7.9.2 Reading in the sequence Reading in sequence parameters for the image takes place in parallel to the process of generating and transporting the image.
7.10 Deferred image transport An image is normally captured and transported in consecutive steps. The image is taken, read out from the sensor, digitized and sent over the 1394 bus. This order of events can be paused or delayed by using the deferred image transport feature.
Video formats, video modes and IEEE 1394 bandwidth Video modes F-201B For- Mode Resolution 3.75 1.875 160 x 120 YUV444 320 x 240 YUV422 640 x 480 YUV411 640 x 480 YUV422 640 x 480 640 x 480 MONO 8 640 x 480 MONO 16 800 x 600...
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Video modes F-201C For- Mode Resolution 3.75 1.875 160 x 120 YUV444 320 x 240 YUV422 640 x 480 YUV411 640 x 480 YUV422 640 x 480 640 x 480 MONO 8 640 x 480 MONO 16 800 x 600 YUV422 800 x 600 800 x 600...
Area of interest (AOI) The image sensor on the camera has a defined resolution. This indicates the maximum number of lines and pixels per line that the recorded image may have. However, often only a certain section of the entire image is of interest. The amount of data to be transferred can be decreased by limiting the image to a section when reading it out from the camera.
The left position + width and the upper position + height may not exceed the maximum resolution of the sensor. The coordinates for width and height must be divisible by 2. In addition to the Area of Interest some other parameters have an effect on the maximum frame rate the time for reading the image from the sensor and transporting it in the FRAME_BUFFER...
8.2.1 Vertical binning Vertical binning increases the light sensitivity of the camera by a factor of two by adding together the values of two adjoining vertical pixels output as a single pixel. At the same time this normally improves signal to noise separation by about 2 dB. Figure 34 Vertical binning This reduces vertical resolution to 618 lines.
This increases light sensitivity by a total of a factor of 4 and at the same time signal to noise separation is improved by about 6 dB. Resolution is reduced to 814 x 618 pixels. Figure 36 Full binning Frame rates An IEEE-1394 camera requires bandwidth to transport images.
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The recommended limit for transferring isochronous image data is 1000q (quadlets) per cycle or 4096 bytes (with 400 Mb/s of bandwidth). The table shows that the camera has to send 2560 pixels or 2 lines of video per cycle when using an F-201B camera in format 2 mode 2 (1280 x 960 pixels, 8 bits per pixel) at 15 fps.
How does bandwidth affect the frame rate? In some modes the attainable frame rate is limited by the IEEE-1394a bus. According to the 1394a specification on isochronous transfer, the largest data payload size of 4096 bytes per 125 µs cycle is possible with bandwidth of 400 Mb/s. In addition, because of a limitation in an IEEE-1394 module (GP2Lynx), only a maximum number of 4095 packets per frame are allowed.
Test images F-201B The camera has 2 test images that look the same. Both images show a grey bar running diagonally. One test image is static, the other moves upwards by 1 pixel/frame. Figure 37 Gray bar test image Formula for calculating the gray value: Gray value = (x+y) MOD256 (8-bit mode) Gray value = (x+y) MOD1024 (10-bit mode) F-201C...
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Mono8 (raw data): Figure 39 Bayer-coded test image F-201C The color camera outputs Bayer-coded raw data in Mono8 instead of – as described in IIDC v. 1.3 – a real Y signal. The first pixel of the image is always the red pixel from the senor.
Configuration of the camera All camera settings are made by writing specific values into the corresponding registers. This applies to both values for general operating states such as video formats and modes, exposure times, etc. and to all extended features of the camera that are turned on and off and controlled via corresponding registers.
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Figure 41 Configuration of the camera Sample program: The following sample code in C shows how the register is set for frame rate, video mode/format and trigger mode using the FireCtrl DLL from the FirePackage API and how the camera is switched into ISO_Enabled mode: …...
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The base address for the “configuration ROM” for all registers is FFFF F0000000h. Determined as follows based on the camera-specific base address: Offset 0-7 8-15 16-23 24-31 400h 404h 408h Bus Info Block 40Ch 410h Serial Number 414h 418h 41Ch Root Directory 420h 424h...
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444h Unit Directory 448h 44Ch The entry with key D4 in the unit directory (44Ch in this case) provides the offset for unit dependent info: 44Ch + 000001 * 4 = 450h Offset 0-7 8-15 16-23 24-31 450h 454h Unit Dependent Info 458h 45Ch And finally, the entry with key 40 (454h in this case) provides the offset for the camera...
Figure 42 Directcontrol register “F0F00000h + 82Ch (Offset) = F0F0082Ch” is entered into the Address field. The read out value 1E0h corresponds to 480. Because the temperature is indicated in increments of 0.1°C, the camera has a temperature of 48°C. Implemented registers The following tables show how standard registers from IIDC v.
9.1.4 Inquiry register for video frame rate and base address of the video mode CSR for the partial image size format Offset Name Notes 200h V_RATE_INQ_0_0 (Format_0, Mode_0) 204h V_RATE_INQ_0_1 (Format_0, Mode_1) 208h V_RATE_INQ_0_2 (Format_0, Mode_2) 20Ch V_RATE_INQ_0_3 (Format_0, Mode_3) 210h V_RATE_INQ_0_4 (Format_0, Mode_4) 214h...
9.1.5 Inquiry register for basic function Offset Name Notes 400h BASIC_FUNC_INQ 9.1.6 Inquiry register for feature presence Offset Name Notes 404h Feature_Hi_Inq 408h Feature_Lo_Inq 40Ch Reserved Address error on access 47Fh 480h Advanced_Feature_Inq This register is the offset for the Access_Control_Register and thus the base address for Advanced Features.
9.1.9 Status and control register for feature The OnePush feature for WHITE_BALANCE is currently implemented. If this flag is set, the feature becomes active immediately, even if no images are being input (see Automatic white balance). Offset Name Notes 800h BRIGHTNESS 804h AUTO-EXPOSURE...
9.1.11 Video mode control and status registers for Format_7 The offset to the base address is in V_CSR_INQ_7_x. The offset entered 100h must be added for Mode 1, 200h for Mode 2 200h and 300h for Mode 3. Offset Name Notes 000h MAX_IMAGE_SIZE_INQ...
9.2.1 Advanced Feature Inquiry The presence of each of the following features can be queried by the “0” bit of the corresponding register. Offset Name Field Description 0xF1000040 ADV_INQ_1 MaxResolution TimeBase ExtdShutter TestImage Sequences [6..7] Lookup Tables Shading DeferredTrans [10] [11..30] GP_Buffer [31]...
Offset Name Field Description 0xF1000208 TIMEBASE Presence_Inq Indicates presence of this feature (read only) [1..27] Timebase_ID [28..31] IDs 0-9 are in bits 28 to 31. Refer to the following table for code. Default timebase is 20µs. This means that the integration time can be changed in 20 µs increments with the shutter control.
Offset Name Field Description 0xF1000210 TEST_IMAGE Presence_Inq Indicates presence of this feature (read only) [1..7 Image_Inq_1 Presence of test image 1 0: N/A 1: Available Image_Inq_2 Presence of test image 2 0: N/A 1: Available Image_Inq_3 [10] Presence of test image 3 0: N/A 1: Available Image_Inq_4 [11]...
9.2.7 Lookup tables (LUT) The LUT_CTRL register activates this feature and enables certain LUTs. The LUT_INFO register indicates how many LUTs the camera can store and the maximum size of the individual LUTs. Offset Name Field Description 0xF1000240 LUT_CTRL Presence_Inq Indicates presence of this feature (read only)
Offset Name Field Description 0xF1000250 SHDG_CTRL Presence_Inq Indicates presence of this feature (read only) BuildError [2..3] ShowImage Show shading data as image BuildImage Build a new ShadingImage ON_OFF Shading On/Off Busy Build in progress [8..23] GrabCount [24..31] Number images 0xF1000254 SHDG_MEM_CTRL Presence_Inq Indicates...
Offset Name Field Description 0xF1000260 DEFERRED_TRANS Presence_Inq Indicates presence of this feature (read only) [1..4] SendImage Send NumOfImages now (auto reset) HoldImg Enable/Disable deferred transport mode FastCapture Enable/disable fast capture mode [8..15] FiFoSize [16..23] Size of FiFo in number of images (read only) NumOfImages [24..31]...
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Default Mode 0x00 0x01 reserved 0x02 Trigger input Input 1 0x03 Incremental decoder input 0x04 reserved 0x05 tbd (SPI external DCLK) 0x06..0x0F reserved 0x10..0x1F reserved Trigger If more than one input is being operated in trigger mode, these inputs are logically linked by AND.
9.2.11 Delayed Integration enable A delay time between initiating exposure on the sensor and the activation edge of the IntEna signal can be set using this register. The on/off flag activates/deactivates integration delay. The time can be set in µs in DelayTime. Please note that only one edge is delayed.
Offset Name Field Description 0xF1000350 IO_DECODER Presence_Inq Indicates presence of this feature (read only) [1..5] ON_OFF Enable/diasable trigger on compare CLEAR_COUNTER Set to Clear the position counter (Auto Reset) [8..31] 0xF1000354 IO_DECODER_VAL [0..3] CMP_VALUE [4..15] Compare Value [16..19] CNT_VALUE [20..31] Position Counter Value (rd.
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Index Advanced Feature Inquiry ......62 HiRose jack ..........14 Advanced features ....... 58, 60, 61 HiRose jack pin assignment ......15 Area of Interest...... 30, 37, 43, 44 HiRose plug........15, 68 Asynchronous broadcast ......36 HoldImg ........40, 66, 68 HoldImg mode ........40 Bandwidth ......
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