Features; Fpga I/O Registers; C.1 Features - Advantech MIC-3397 User Manual

C.1

Features

 Power Sequence
 Hot-Swap: Hot insertion and removal control
 LPC Bus: Provide LPC Bus access
 Watchdog
 2x SPI Cross-Switch: Dedicated SPI cross-switch for BIOS
 Debug Message: Boot time POST message
C.2

FPGA I/O Registers

The Advantech MIC-3397 FPGA communicates with main I/O spaces. The LPC unit
is used to interconnect the Intel LPC signals. The Debug Port Unit is used to decode
POST codes. The Watchdog is used to detect BIOS ready signal or recover BIOS
code from redundant BIOS flash. The Hot-Swap Out-Of-Service LED Control Unit is
used to control the blue LED during Hot-Insert and Hot-Remove. The other signals in
the Miscellaneous Unit are for interfacing with corresponding I/O interface signals.
LPC Address
0x80h
0x440h
0x441h
0x442h
0x443h/0x 444h
0x445h
0x447h
MIC-3397 User Manual
I/O Type Description
W Port 80 Display
R FPGA minor revision ID
R Watch Dog Timer Display
R BIOS Switch display
RW Watchdog Register
R FPGA major revision
R Geography Address (GA)
60