DFI LANParty Jr. GF9400 T2RS User Manual page 84

3
BIOS Setup
Memory Timing Setting
Move the cursor to this field and press <Enter>. The following
screen will appear.
x tCL (CAS Latency)
x tRCD
x tRP
x tRAS
x Command Per Clock (CMD)
x tRRD
x tRC
x tWR
x tWTR
x tREF
↑↓→←
F5: Previous Values
The settings on the screen are for reference only. Your version may not be
identical to this one.
Memory Timing Setting
Expert
Optimal
tCL (CAS Latency)
This field is used to select the clock cycle of the SDRAM CAS
latency time. The option selected specifies the time before SDRAM
starts a read command after receiving it.
tRCD
This field is used to select the RAS# to CAS# delay time when
reading and writing to the same bank.
84
Phoenix - AwardBIOS CMOS Setup Utility
Parameters
Memory Timing Setting
** Advanced Memory Settings **
: Move Enter: Select +/-/PU/PD: Value
Allows you to enter the timings manually.
Select this option to use the value recommended by
the DIMM manufacturer.
Memory Timing Setting
Setting Current Value
Optimal
Auto 5
Auto 5
Auto 5
Auto 15
Auto 2T
Auto 3
Auto 23
Auto 6
Auto 11
Auto 7.6uS
F10: Save
F6: Fail-Safe Defaults
Item Help
Menu Level
ESC: Exit F1: General Help
F7: Optimized Defaults