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servo track and defines physical sector zero. The
index mark is nothing more than one sector mark
followed by another recorded in the middle of the
sector. This is the only spot on the track where
sector marks are separated by only 40 cells, rather
than the usual 80.
The second, or "quad", dibit pair
(A' /8')
is physi-
cally offset one-half track from the in-phase dibits.
Thus, when track following on this pair, the data
heads will be exactly one-half track from track
center. The quad dibits are used when recording
sampled servo on the data surfaces.
In addition to being used to record sampled servo
code, the quad dibits are also used to generate the
track crossing signal during seeks. By using quads,
the final track crossing signal occurs when the
heads are one-half track from the target, which al-
lows the servo system to turn on the fine position-
ing loop in time to bring the heads on track.
The outer servo guard band is similar to the data
area, but the quad dibits have been deleted from
each cell. Only in-phase dibits (A/B) are recorded
in this area. The first 8 cells of each sector in the
outer guard band contains a unique pattern of
dibits, known as the guard band mark. Selected
dibits are deleted from each cell to identify the
guard band mark. Because the absence of a single
dibit within the cell represents a 0, each individual
dibit is sensed to detect the guard band mark.
Like the data area, the inner guard band servo area
contains four dibits in each cell. However, the in-
ner guard band is distinct from the data area in
that no sector marks are recorded at sector boun-
daries. Servoing is possible in either guard band
area.
5-15. SAMPLED SERVO CODE. The sampled
servo code is written at the factory with a sampled
servo writer, using the dedicated servo code as a
timing and physical reference. The servo writer
uses the read/write heads in the drive to write and
verify the servo code. The sampled servo code is
written on all data tracks on all 7 (HP 7936) or 13
(HP 7937) data surfaces.
When writing the sampled servo code, the servo
head is track following on the quad dibits;
therefore the sampled servo code is physically
Functional Description
7936 and 7937
offset 1/2 track from the center of the adjacent
data track (see figure 5-13).
When reading the
sampled servo code, the data head is physically lo-
cated midway between the two (odd and even)
sampled servo code patterns. This allows the head
to detect dibits from both patterns.
The complete window for the sampled servo code
is defined by Gap (<3AP-L,), which is generated by
the servo controller.
The first portion of the
sampled servo field is occupied by two sets of
coincident dibits. The first set of dibits functions
as a qualifying pulse, ensuring that any power-on
noise is not erroneously identified as a valid sync
pulse. The second set of coincident dibits are the
servo sync pulse. This pulse, when followed by the
requisite number of zeros, synchronizes the
sampled servo code to the dedicated servo.
The servo sync pulse is followed approximately 54
Write Clocks (WC) later by six alternating dibits
(three odd, three even).
It
is from these six dibits
that the sampled servo circuit determines how far
the read/write head is offset from track center.
5-16. SERVO HEAD.
The servo head is a
Winchester technology head, similar to the data
read/write heads. (These heads are described in
detail in the read/write system functional descrip-
tion.) When the drive is manufactured, the servo
head is used to write the dedicated servo code on
the servo surface. Following completion, the servo
head is used only to read this servo code.
5-17. SERVO READ PREAMPLIFIER/WRITE
DRIVER IC. The servo read preamplifier /write
driver
IC
is
similar
to
the
data
read
preamplifier /write driver ICs.
(These ICs
are
described in detail in the read/write system func-
tional description.) During manufacture of the
drive, the write driver section of the IC is used
when the dedicated servo information is written
on the servo surface. Following completion of the
drive, only the read preamplifier section of the
Ie
is used.
5-18. DRIVE ID CIRCUIT.
The drive iden-
tification
(10)
circuit is permanently programmed
during manufacture of the head-disc assembly to
identify the HDA as having seven (7936) or 13
5-13
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