Interrupt Status Register; I/O Port Registers - Motorola MC68306 User Manual

1 = Autovector.
5.2.4.2 INTERRUPT STATUS REGISTER. An enabled, active interrupt appears as a one
in the interrupt status register, regardless of the active voltage level programmed at reset.
This register is read-only, writes to this register are ignored.
FFFFFFF8/9
15 14 13 12
IRQT IRQ7 IRQ6 IRQ5
RESE
T:
0 0 0
0
IRQT—DUART Timer Interrupt State
0 = No interrupt.
1 = Interrupt asserted.
IRQ7–1—Interrupt Request 7 through 1
These bits indicate interrupt status for the external interrupts 7, 6, 5, 4, 3, 2, and 1.
0 = No interrupt.
1 = Interrupt asserted.
IRQD—DUART Interrupt State
This bit indicates the DUART interrupt state.
0 = No DUART interrupt.
1 = DUART interrupt asserted
IX7–1—Reset (inactive) level of external interrupts 7 through 1.
0 = Active high interrupt pin.
1 = Active low interrupt pin.

5.2.5 I/O Port Registers

The following paragraphs describe the registers controlling the parallel ports. All port pins
are reset to input by a system reset, so pullup or pulldown resistors should be added
externally as needed. To enable a port A bit as an output, write a one to the appropriate
bit position of the port direction register. If a bit is programmed as an output, the data
written to the port data register appears in true form at the pin. The data read back from
the port pins register is the same level as appears at the pin. The data read from the port
data register is the last value written to the register, regardless of the level at the pin. The
port data register is not affected by any reset, so it should be initialized before enabling
any bits as outputs.
5-6
11 10 9 8
IRQ4 IRQ3 IRQ2 IRQ1
0 0 0 0
MC68306 USER'S MANUAL
7 6 5 4
IRQD IX7 IX6 IX5
0 IRQ7 PB7/IR PB6/IR
Q6 Q5
3 2 1 0
IX4 IX3 IX2 IX1
IRQ4 PB5/IR PB4/IR IRQ1
Q3 Q2
SUPERVISOR ONLY
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