Processing Of Specific Exceptions; Table 4-5. Exception Vector Assignments - Motorola MC68306 User Manual

Vector
Number(s)
0
1
2
3
4
5
6
7
8
9
10
11
12 1
13 1
14
15
16–23 1
24
25
26
27
28
29
30
31
32–47
48–63 1
64–255
NOTES:
1. Vector numbers 12, 13, 16–23, and 48–63 are reserved for future enhancements by Motorola.
No user peripheral devices should be assigned these numbers.
2. Reset vector (0) requires four words, unlike the other vectors which only require two words,
and is located in the supervisor program space.
3. The spurious interrupt vector is taken when there is a bus error indication during interrupt processing.
4. TRAP #n uses vector number 32+ n.
5. Reserved.
6. SP denotes supervisor program space, and SD denotes supervisor data space.

4.6 PROCESSING OF SPECIFIC EXCEPTIONS

The exceptions are classified according to their sources, and each type is processed
differently. The following paragraphs describe in detail the types of exceptions and the
processing of each type.
4-16

Table 4-5. Exception Vector Assignments

Vector Offset
Space 6
(Hex)
000 SP
004 SP
008 SD
00C SD
010 SD
014 SD
018 SD
01C SD
020 SD
024 SD
028 SD
02C SD
030 —
034 —
038 SD
03C SD
040–05C —
060 SD
064 SD
068 SD
06C SD
070 SD
074 SD
078 SD
07C SD
080–0BC SD
0C0–0FC —
100–3FC SD
MC68306 USER'S MANUAL
Assignment
Reset Initial Interrupt Stack Pointer 2
Reset Initial Program Counter 2
Bus Error
Address Error
Illegal Instruction
Integer Divide by Zero
CHK Instruction
TRAPV Instruction
Privilege Violation
Trace
Line 1010 Emulator (Unimplemented A-Line Opcode)
Line 1111 Emulator (Unimplemented F-Line Opcode)
(Unassigned, Reserved)
(Unassigned, Reserved)
Format Error 5
Uninitialized Interrupt Vector
(Unassigned, Reserved)
Spurious Interrupt 3
Level 1 Interrupt Autovector
Level 2 Interrupt Autovector
Level 3 Interrupt Autovector
Level 4 Interrupt Autovector
Level 5 Interrupt Autovector
Level 6 Interrupt Autovector
Level 7 Interrupt Autovector
TRAP #0–15 Instruction Vectors 4
(Unassigned, Reserved)
User Defined Vectors
MOTOROLA