Intel SL7PG - Xeon 3.4 GHz/800MHz/1MB Cache CPU Processor Specification page 11

Table 3. DP Platform Population Matrix for the 64-bit Intel
System Bus (1 MB and 2 MB L2 Cache Versions) FC-PGA4 Package
Processor Signature / Core
0F34h / D-0
0F41h / E-0
0F49h / G-1
0F43h / N-0
0F4Ah / R-0
NOTES:
1. X = Mixing processors of different steppings is not supported. This stepping/frequency is not supported in DP.
2. NI = Currently no known issues associated with mixing these steppings.
3. TBD = No issues are expected, however further investigation is required to fully validate this DP solution.
® ®
64-bit Intel Xeon Processor with 800 MHz System Bus
(1 MB and 2 MB L2 Cache Versions) Specification Update
0F34h / D-0
Stepping
NI
NI
NI
®
Xeon
0F41h / E-0 0F49h / G-1
NI
NI
NI
X X
X X
Identification Information
®
Processor with 800 MHz
0F43h / N-0 0F4Ah / R-0
NI X
NI X
NI X
X NI
X NI
X
X
X
NI
NI
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