General Pcb Routing Guidelines; Figure 17-1. General Pcb Routing Guidelines - Nvidia Jetson Orin NX Series Product Manual

Max Trace Lengths/Delays
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Trace lengths or delays should include the carrier board PCB routing (where the Orin
module mating connector resides) and any additional routing on a Flex or secondary PCB
segment connected to main PCB. The max length or delay should be from Orin module to
the actual connector (that is USB, HDMI, and so on) or device (that is, onboard USB device,
camera imager IC, and so on).
Trace Delay or Flight Time Matching

Signal flight time is the time it takes for a signal to propagate from one end (driver) to
other end (receiver). One way to get same flight time for signal within signal group is to
match trace lengths within specified delay in the signal group.
Total trace delay = Carrier PCB trace delay only. Do not exceed maximum trace delay
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specified.
It is recommended to match trace delays based on flight time of signals. For example,
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outer-layer signal velocity could be 5.9 ps/mm and inner-layer 6.9 ps/mm. If one signal
is routed 250 mm on the outer layer and second signal is routed 250 mm in the inner
layer, the difference in flight time between two signals will be 250 ps! That is a big
difference if required matching is 15 ps (trace delay matching). To fix this, inner trace
needs to be 36 mm shorter or outer trace needs to be 42 mm longer.
In this design guide, terms such as intra-pair and inter-pair are used when describing
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differential pair delays. Intra-pair refers to matching traces within differential pair (for
example, true to complement trace matching). Inter-pair matching refers to matching
differential pairs average delays to other differential pair average delays.
17.4.1

General PCB Routing Guidelines

For GSSG stack-up to minimize crosstalk, signal should be routed in such a way that they are
not on top of each other in two routing layers (see Figure 17-1).
Do not route other signals or power traces and areas directly under or over critical high-speed
interface signals.
Figure 17-1. General PCB Routing Guidelines
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Note: The requirements detailed in the interface signal routing requirements tables must be met
for all interfaces implemented or proper operation cannot be guaranteed.
PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series
General Routing Guidelines
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