Routing Guidelines Format; Signal Routing Conventions; Routing Guidelines - Nvidia Jetson Orin NX Series Product Manual

17.2

Routing Guidelines Format

The routing guidelines have the following format to specify how a signal should be routed.
Breakout traces are traces routed from BGA ball either to a point beyond the ball array, or

to another layer where full normal spacing guidelines can be met. Breakout trace delay
limited to 12.5 mm unless otherwise specified.
After breakout, signal should be routed according to specified impedance for differential,

single-ended, or both (for example: HDMI). Trace spacing to other signals also specified.
Follow max and min trace delays where specified. Trace delays are typically shown in mm

or in terms of signal delay in pico-seconds (ps) or both.
For differential signals, trace spacing to other signals must be larger of specified ×
•
dielectric height or inter-pair spacing
Spacing to other signals and pairs cannot be smaller than spacing between
•
complementary signals (intra-pair).
Total trace delay depends on signal velocity which is different between outer
•
(microstrip) and inner (stripline) layers of a PCB.
17.3

Signal Routing Conventions

Throughout this design guide, the following signal routing convention is used:
SE Impedance (/ Diff Impedance) at x Dielectric Height Spacing

SE impedance of trace (along with diff impedance for diff pairs) is achieved by spacing
•
requirement. Spacing is multiple of dielectric height. Dielectric height is typically
different for microstrip and stripline.
Note: Trace spacing requirement applies to SE traces or differential pairs to other SE traces or
differential pairs. It does not apply to traces making up a differential pair. For this case, spacing
and trace widths are chosen to meet differential impedance requirements.
17.4

Routing Guidelines

Pay close attention when routing high speed interfaces, such as HDMI, DP, USB 3.2, PCIe, or
CSI. Each of these interfaces has strict routing rules for the trace impedance, width, spacing,
total delay, and delay or flight time matching. The following guidelines provide an overview of
the routing guidelines and notations used in this design guide.
Controlled Impedance

Each interface has different trace impedance requirements and spacing to other traces. It
is up to designer to calculate trace width and spacing required to achieve specified SE and
Diff impedances. Unless otherwise noted, trace impedance values are ±15%.
PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series
General Routing Guidelines
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