Intel Pentium M Processor Design Manual page 13

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Intel Pentium M Processor and Intel E7501 Chipset Platform
Contents
149 Serpentine Spacing-Spacing to Reference Plane Height Ratio................................................ 217
150 Spread Spectrum Modulation Profile ........................................................................................219
151 Impact of Spread Spectrum Clocking on Radiated Emissions ................................................. 220
152 Cancellation of H-fields Through Inverse Currents ................................................................... 220
153 Length Tuning Parameters ....................................................................................................... 222
154 Signal Length Solution Space with One Strobe ........................................................................ 223
155 Signal Length Solution Space with Two Strobes ...................................................................... 223
156 Signal Length Solution Space with Maximum Tolerance Strobes ............................................ 224
157 Signal Length Solution Space with Matched Strobes ............................................................... 224
158 Total Signal Length with Two Components .............................................................................. 225
159 Package Trace Length Differences ..........................................................................................228
160 Example of PLC Compensation on the Motherboard ............................................................... 229
161 Illustration of PLC Length Matching ..........................................................................................230
162 CPU Like-Signals Grouped....................................................................................................... 234
163 MCH Like-Signals Grouped ......................................................................................................234
164 MCH Fill .................................................................................................................................... 235
165 Signal Parallelism ..................................................................................................................... 236
166 Improper Via Sharing ................................................................................................................ 237
167 Correct Via Sharing ..................................................................................................................238
168 Improper Necking Down ........................................................................................................... 239
169 Correct Necking Down .............................................................................................................. 240
170 Signal Crossing Plane Splits..................................................................................................... 241
Design Guide
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