Mitsubishi MELSEC QS Series Programming Manual page 220

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Number
Name
SD150
SD151
I/O module
verify error
SD152
SD153
(2) System information
Number
Name
Status of
SD200
switch
SD201
LED status
Operating
SD203
status of CPU
App-22
Appendix 3 SPECIAL REGISTER LIST
TableApp.3.2 Special register
Meaning
• When I/O modules, of which data are different from those
entered at power-on, have been detected, the I/O module
numbers (in units of 16 points) are entered in bit pattern.
Bit pattern, in
(Preset I/O module numbers set in parmeters when parameter
units of 16
setting has been performed.)
points,
indicating the
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
modules with
0
0
SD150
verify errors.
0
0
0: No I/O verify
SD151
errors
1
0
SD153
X Y
( )
1: I/O verify
3E0
error present
• Not cleared even if the blown fuse is replaced with a new one.
This flag is cleared by error resetting operation.
TableApp.3.4 Special register
Meaning
• The CPU switch status is stored in the following format.
b15
Status of CPU
switch
1): CPU switch status
• The following bit patterns are used to store the statuses of the
LEDs on the CPU module:
• 0 is off, 1 is on, and 2 is flicker.
b15
to
b12b11
Status of
CPU-LED
8)
7)
1): RUN
2): ERR.
3): USER
4): BAT.
• The CPU operating status is stored as indicated in the
following figure:
b15
to
b12 b11
1): Operating status
Operating
of CPU
status of CPU
2): STOP cause
Note stores the above-mentioned factors from the smallest
number in priority to the largest one. However, "4:error" is treated
as the highest priority.
Explanation
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
X Y
(
)
190
0
0
0
0
0
0
0
0
0
Indicates an I/O module verify error
Explanation
to
b4 b3
Empty
0: RUN
1: STOP
2: RESET
to
b8 b7
to
b4 b3
6)
5)
4)
3)
5): Empty
6): Empty
7): TEST
8): Empty
to
b8 b7
to
b4 b3
2)
0:
RUN
2:
STOP
0:
Instruction in remote operation program
from RUN/STOP/RESET switch
1:
Remote contact
2:
Remote operation from GX Developer/
serial communication, etc.
4:
Error
Set by
(When set)
1
0
0
0
0
S (Error)
X Y
( )
0
0
0
0
0
0
0
0
0
0
0
Set by
(When set)
to
b0
1)
S (Every END)
to
b0
S (Status
change)
2)
1)
to
b0
1)
S (Every END)
Corresponding
CPU
QS
Corresponding
CPU
QS

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