Mitsubishi Electric MELSEC-A0J2H Series Handbook page 134

Table of Contents

Advertisement

7
PROGRAMS REPLACEMENT
Description
BIN 32-bit data comparison
Parallel connection
Out instruction
Training edge output
Leading edge output
Print ASCII code instruction
Print comment instruction
Left rotation of 16-bit data
Right rotation of 16-bit data
Return from subroutine program
Remote I/O station data read
Left rotation of 16-bit data
Right rotation of 16-bit data
Bit device reset
Remote I/O station data write
Pointer branch instructions
7 segments decode
Partial refresh
16-bit data search
Bit device set
n-bit shift to left of 16-bit data
n-bit shift to right of 16-bit data
Bit device shift
Set and rest of status latch
Carry flag set
Sequence program stop
Set and reset of sampling trace
*1
Note that the buffer memory address may differ between the A series and Q series.
*2
The high-speed and retentive timers are automatically converted according to the parameter settings.
7
- 22
: Automatic converted,
A0J2HCPU
Instruction name Instruction name Convertibility
ORD<
ORD<
ORD<=
ORD<=
ORD<>
ORD<>
ORD=
ORD=
ORD>
ORD>
ORD>=
ORD>=
ORI
ORI
OUT
OUT
PLF
PLF
PLS
PLS
PR
OUT SM1255
PRC
OUT SM1255
RCL
RCL
RCLP
RCLP
RCR
RCR
RCRP
RCRP
RET
RET
RFRP
OUT SM1255
ROL
ROL
ROLP
ROLP
ROR
ROR
RORP
RORP
RST
RST
RTOP
OUT SM1255
SCJ
SCJ
SEG
SEG
SEG
SEG
SER
SER
SERP
SERP
SET
SET
SFL
SFL
SFLP
SFLP
SFR
SFR
SFRP
SFRP
SFT
SFT
SFTP
SFTP
SLT
OUT SM1255
SLTR
OUT SM1255
STC
OUT SM1255
STOP
STOP
STRA
OUT SM1255
STRAR
OUT SM1255
×
: Partially changed,
: Manual conversion required
QCPU
Reference sections
*2
×
Section 7.2.2 (3)
×
Section 7.2.2 (3)
Section 7.7.7
Section 7.7.7
Section 7.7.7
Section 7.7.7
×
Section 7.2.2 (3)
Section 7.7.7
Section 7.7.7
Section 7.7.7
Section 7.7.7
×
Section 7.2.2 (3)
×
Section 7.7.7
Section 7.7.7
Section 7.7.7
×
Section 7.2.2 (3)
×
Section 7.2.2 (3)
×
Section 7.2.2 (3)
×
Section 7.2.2 (3)
×
Section 7.2.2 (3)

Advertisement

Table of Contents
loading

This manual is also suitable for:

Melsec q series

Table of Contents