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High-Speed Counter and Pulse Output
Input mode
Input signals
Incremental/
decremental
Incremental/
decremental
control
Count for reset
(incremental)
The reset is executed by the interruption at
and
The reset input can be enabled/disabled using bit 2 of
sys_wHscOrPulseControlCode (see page 111).
108
0
1
2
3
4
3
a
b
0
1
2
3
4
a
b
a
0
1
2
0
1
c
b
(falling edge)
2
1
2
3
4
3
a
b
3
2
1
0
b
TRUE
FALSE
2
n - 1 n
a
(rising edge)
FPΣ User's Manual
Inputs: X0+X1 (X3+X4)
1
TRUE
Count
FALSE
2
TRUE
Increasing
a
FALSE
Decreasing
b
Inputs: X0+X1 (X3+X4
1
TRUE
or X4+X7)
FALSE
Count
2
TRUE
Increasing
a
FALSE
Decreasing
b
Inputs: X0 or X1 (X3 or
1
X4)
Reset input: X2 (X5)
2
Count
3
Rising edge: count
disabled, elapsed value
a
cleared
Falling edge: count
b
enabled
Count prohibited
c
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