Mitsubishi MELSEC Q Series Reference Manual page 350

External device
side
(Data name)
Programmable
controller CPU side
(Example)
0
M
0
7
3 - 290
3 WHEN COMMUNICATING USING THE QnA COMPATIBLE 3E/3C/4C FRAMES OR 4E FRAME
• When the "Word/byte units designation" in GX Works2 or GX
Configurator-SC is set to "1" (byte units)
(Refer to section 3.1.5.)
D S
L T
E X
L H L H
10 02 44 00 F8 00 00 FE FE 03
H H H H H H H H H H
(Refer to section 3.3.1.) (Refer to section 3.1.7.) (Refer to section 3.3.1.) (Refer to section 3.1.7.)
Data read
(Word device
D0
value
value
(D)
L – H L H L H L
000000 0004 0008 1030
H H H
Additional
code
00 00 00 A8 04 00 08 00 30
H H H H H H H H H
Data read
(Bit device
1 block)
M0 to M16 to
M15 M31
value
value
L – H (M) L H L H L H
000000 0002 1131 4849
H H H
00 00 00 90 02 00 31 11 49 48
H H H H H H H H H
3 1 1 1
0 1 1 0 0 0 1 0 0 0 1 0 0 0 1
M M M M M M M M M M M M M M M
0 0 0 0 0 0 0 1 1 1 1 1 1 0 0
6 5 4 3 2 1 0 5 4 3 2 1 0 9 8
D E
L T
E X
L – H L H L H
00 00 00 01 01 00 01 00 10 03
H H H H H H H H H
CPU information·····0000
(Refer to section 3.17.1.)
: Fixed value
L H
00 00 02 21 01 02 01 01
H H H H H H H H
Each of
registered counts
1 block)
(Word device 2 block)
D1 D2 D3 W100
value value value
H L H L H L – H (W) L H L
1545 2800 000100 0008 0970
H H H H H
10 10 45 15 00 28 00 01 00 B4 08 00 70
H H H H H H H H H H H H
Data order for the number
of registered bit blocks
H
H
Data order of CPU information
H L
3 6
33 36
H H H
: Normal
H
0001 : Module warning being generated
H
0002 : Module error/module system error being generated
H
Data read
W107
value
H – – – L H
0131
H H
09 31 01
H H H H
Data order for the number
of registered word blocks
3- 290