Mitsubishi MELSEC Q Series Reference Manual page 141
With melsec communication protocol
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(4) Multiple block batch read (command: 0406)
(Refer to Section 3.3.1.)
(Data name)
External device
side
H
-
-
0
4
0
30
34
30
H
H
(Data name)
Programmable
controller CPU side
H
0
30
3 - 81
3 WHEN COMMUNICATING USING THE QnA COMPATIBLE 3E/3C/4C FRAMES OR 4E FRAME
The examples shown in this section explain the control procedure for reading by
randomly designating multiple blocks, where one block consists of n points of
contiguous bit device memory (1 point = 16 bits) and word device memory (1
point = 1 word).
The data order and contents of the areas marked with " " in the control
procedure diagram differ depending on the module, communication frame and
format used.
Refer to the detailed information described in Section 3.1.
(a) The following device memories are read while communicating in ASCII code
• Word device memory : 2 blocks
• Bit device memory
L
H
-
-
L
H
L
H
L
H
-
-
6
0
0
0
0
0
2
0
3 D
0
0
0
36
30
30
30
30
30
32
30
33
44
2A
30
30
30
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Designate the first device of each block for the number of word device blocks
H
-
-
-
M
0
0
0
0
4D
2A
30
30
30
30
H
H
H
H
H
H
Designate the first device of each block for the number of bit device blocks
Data read
(Word device first block)
-
-
L
H
-
-
L
H
-
-
L
H
-
-
0
0
8
2
0
3
0
1
5
4
5
2
8
0
30
30
38
32
30
33
30
31
35
34
35
32
38
30
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
2
0
0 1 0 0 0 0 0 0 0 1 1 0 0 0 0
M M M M M M M M M M M M M M M M
1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
: 3 blocks
(Refer to Section (3))
H
-
-
-
-
-
-
L
H
-
-
L
0
0
0
0
0
0
4
W
0
0
0
1
0
30
30
30
30
30
30
34
57
2A
30
30
30
31
30
30
H
H
H
H
H
H
H
H
H
H
H
H
H
H
-
L
H
-
-
L
H
-
-
-
-
L
M
0
0
0
0
0
2
0
0
0
1
2
8
30
30
30
30
30
32
4D
2A
30
30
30
31
32
38
30
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Data read
(Word device 2nd block)
L
H
-
-
L
H
-
-
L
0
0
9
7
0
0
1
3
1
30
30
39
37
30
30
31
33
31
H
H
H
H
H
H
H
H
H
Data read
(Bit device first block)
(Bit device 2nd block)
Status of M0
Status of M16
Status of M128
to M15
to M31
to M143
(4 characters)
(4 characters)
(4 characters)
H
-
-
L
H
-
-
L
H
2
0
3
0
4
8
4
9
C 3
32
30
33
30
34
38
34
39
43
33
H
H
H
H
H
H
H
H
H
0
3
0
D0 to D3 (4 points),
W100 to W107 (8 points)
M0 to M31 (2 points),
M128 to M159 (2 points),
B100 to B12F (3 points)
L
H
-
-
L
0
0
0
0
8
30
30
30
38
H
H
H
H
H
H
-
-
L
H
-
-
-
-
L
H
-
B
0
0
0
1
0
0
0
0
0
2
0
0
30
30
32
42
2A
30
30
30
31
30
30
30
30
30
H
H
H
H
H
H
H
H
H
H
H
H
H
H
(Refer to Section 3.1.7.)
Data read
Data read
(Bit device 3rd block)
Status of M144
Status of B100
Status of B110
to M159
to B10F
to B11F
(4 characters)
(4 characters)
(4 characters)
-
-
L
H
-
-
L
H
-
-
L
H
-
-
L
D E
2
8
0
0
0
9
7
0
B
9
A
F
44
45
32
38
30
30
30
39
37
30
42
39
41
46
H
H
H
H
H
H
H
H
H
H
H
H
H
H
-
L
0
3
33
H
H
Status of B120
to B12fF
(4 characters)
H
-
-
L
B
9 A
F
42
39
41
46
H
H
H
H
H
3 - 81
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