Mitsubishi MELSEC Q Series Reference Manual page 134

Device
Input
Output
Internal relay
Latch relay
Step relay
Link relay
Annunciator
Special relay
Contact
Timer T
Coil
Current value
Contact
Counter C
Coil
Current value
Data register
Link register
9
File register
Special register
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3 WHEN COMMUNICATING USING THE QnA COMPATIBLE 3E/3C/4C FRAMES OR 4E FRAME
(b) In the case of programmable controller CPUs other than Q/L/QnACPU
Device code
Type
ASCII Binary QnA compatible 3C/4C
code code
X 9C 000000 to 001FFF
H
Y 9D 000000 to 001FFF
H
M 90 000000 to 008191
H
L 92 000000 to 008191
H
Bit
S 98 000000 to 008191
H
B A0 000000 to 001FFF
H
F 93 000000 to 002047
H
M 90 009000 to 009255
H
TS C1
H
Bit
000000 to 002047
TC C0
H
Word TN C2
H
CS C4
H
Bit
000000 to 001023
CC C3
H
Word CN C5
H
D A8 000000 to 008191
H
Word
W B4 000000 to 001FFF
H
R AF 000000 to 008191
H
Word
ZR B0 000000 to 07FFFF
H
Word D A8 009000 to 009255
H
9 Access is to device memory inside the designated CPU.
Take the following precautions when accessing a programmable controller
CPU other than a Q/L/QnACPU.
1) Access the programmable controller CPU within the device number
range that can be used by the access destination programmable
controller CPU.
2) When accessing a programmable controller CPU, except the external
device connecting station's Q/L/QnACPU and a Q/L/QnACPU that is
accessed over CC-Link IE Controller Network, CC-Link IE Field
Network, MELSECNET/H, MELSECNET/10, in word units, always
make sure the bit device number is a multiple of 16 (for decimal, 0,
16....).
Special relays M beginning from M9000 can be designated by (9000 +
multiple of 16).
3) When accessing the programmable controller CPU via the QnA
compatible 3C/4C frame, the M, L, and S ranges are designated.
However, if the number range of M is designated by L and S or vise
versa, they are processed identically.
When accessing the programmable controller CPU via the QnA
compatible 3E frame or 4E frame, designate M by L and S.
4) Special relays (M9000 to M9255) and special registers (D9000 to
D9255) are divided into read only, write only and system use.
Writing data to outside the write enable range may result in a
programmable controller CPU error.
Refer to the ACPU Programming Manual for a detailed description of
the special relays and special registers.
10 Refer to (a)
Device number range (Default)
QnA compatible 3E
frame frame, 4E frame
000000 to 0007FF
000000 to 0007FF
000000 to 008191
000000 to 008191
000000 to 008191
000000 to 000FFF
000000 to 002047
009000 to 009255
000000 to 002047
000000 to 001023
000000 to 006143
000000 to 000FFF
000000 to 008191
000000 to 07FFFF
009000 to 009255
4.
Remarks
Representation
Hexadecimal
Hexadecimal
Decimal
Decimal
Decimal
Hexadecimal
• Extension designation is not
Decimal
possible.
Decimal
• Access these devices by
designating the device and
device range in the access
Decimal
destination.
Decimal
Decimal
Hexadecimal
• For normal access by block
Decimal
switching.
Hexadecimal
• For serial No. access.
Decimal
9
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