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Mitsubishi MELSEC Q Series Reference Manual page 137

With melsec communication protocol
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(Data name)
External device
side
H
-
-
(Data name)
Programmable
controller CPU side
H
Word device data read. Total number of points for each block
(Data name)
External device
side
H
L
(Data name)
Programmable
controller CPU
side
Word device data read. Total number of points for each block
3 - 77
3 WHEN COMMUNICATING USING THE QnA COMPATIBLE 3E/3C/4C FRAMES OR 4E FRAME
(1) Data order in the character area during the multiple block batch
read
This section explains how data is ordered in the character areas during multiple
block batch read.
(a) Data order when communicating in ASCII code
L
H
-
-
L
H
L
H
L
H
L
H
-
-
Designated the device to be read
(first block)
H
-
-
Designated the device to be read
(first block)
Designated the device to be read (for designated number of bit device blocks)
H
-
-
H
-
-
L
-
-
L
(b) Data order when communicating in binary code
H
L
H
-
L
H
L
Designated the device
Designated the device
to be read (first block)
to be read (n block)
Designated the device to be read
(for designated number of word device blocks)
-
-
L
H
-
-
L
H
Designated the device to be read
Designated the device to be read
(for designated number of word device blocks)
-
-
L
H
-
-
L
H
Designated the device to be read
L
H
-
-
L
H
-
-
L
H
Bit device data read. Total number of points for each block
H
-
L
H
L
H
-
L
H
L
Designated the device
to be read (first block)
(for designated number of bit device blocks)
Bit device data read. Total number of points for each block
-
-
-
-
L
H
-
-
L
(n block)
-
-
-
-
L
H
-
-
L
(m block)
H
-
-
L
-
-
L
H
-
L
H
L
H
-
L
Designated the device
to be read (m block)
Designated the device to be read
H
-
-
L
H
L
3 - 77

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