National Instruments 653 Series User Manual page 81

Chapter 3 Timing Diagrams
ACK
REQ
Output Data Valid
(REQ-edge
Latching)
Output Data Valid
(REQ-edge
Latching Disabled)
Parameter
Input Parameters
t
REQ pulse width
rr*
t
REQ inactive duration
r*r
t
ACK inactive to next REQ inactive
a*r*
Output Parameters
t
ACK pulse width
aa*
t
REQ inactive to new output data
r*do(1)
(with REQ-edge latching)
t
REQ inactive to new output data
r*do(2)
(with REQ-edge latching disabled)
t
Output data valid to ACK
doa
(with REQ-edge latching disabled)
1
t (min) = 225 + programmable delay
aa*
2
t (max) = 275 + programmable delay
aa*
When REQ-edge latching is disabled (default), output valid data is held t
Note
after the trailing edge of REQ occurs. With REQ-edge latching enabled, output data will
be at most t
NI 653X User Manual
t
r*r
t
doa
Description
Figure 3-25. Trailing-Edge Output Timing Diagram
ns after the trailing edge of REQ occurs.
r*do(1)
t t
aa* a*r*
t
rr*
ACK and REQ are shown as active high.
Minimum
3-26
t
r*do(1)
t
r*do(2)
Maximum
75 —
75 —
0 —
1
225 275
0 50
0 —
25 —
r*do(1)
2
ns
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