National Instruments 653 Series User Manual page 135

For traditional ni-daq. high-speed digital i/o devices for pci, pxi, compactpci, at, eisa, and pcmcia bus systems
Hide thumbs Also See for 653 Series:
Table of Contents

Advertisement

Glossary
mask
MSB
0
open collector
P
pattern I/O
PCI
PCLK
PCMCIA
peripheral device
PLL
Plug and Play ISA
port
posttrigger
PPI
pretrigger
NI 653X User Manual
The bits that are significant for pattern detection, also applies to change
detection.
most significant bit
Output driver that drives its output pin to 0 V for logic low, but puts the pin
in the high-impedance state for logic high.
Data-transfer mode in which NI 653X transfers data on the falling or rising
edge of a TTL signal, typically at a constant rate.
Peripheral Component Interconnect—A high-performance expansion bus
architecture originally developed by Intel to replace ISA and EISA. It has
achieved widespread acceptance as a standard for PCs and workstations; it
offers a theoretical maximum transfer rate of 132 MB/s.
See
control signals
An expansion bus architecture that has found widespread acceptance as a
de facto standard in notebook-sized computers. It originated as a
specification for add-on memory cards written by the Personal Computer
Memory Card International Association.
Any external device connected to the NI 653X that the NI 653X controls,
monitors, tests, or with which it communicates.
phase lock loop
A specification prepared by Microsoft, Intel, and other PC-related
companies that will result in PCs with plug-in boards that can be fully
configured in software, without jumpers or switches on the devices.
A collection of lines, usually eight.
Acquiring data that occurs after a trigger.
programmable peripheral interface
Acquiring data that occurs before a trigger.
G-6
ni.com

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

65346533

Table of Contents