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NI 6583R User Guide and Specifications
The NI 6583R is a single-ended and differential signaling device designed to work in conjunction with
your NI FlexRIO™ FPGA module. The NI 6583 is available in two versions: one with low-voltage
differential signals (LVDS) and another with multipoint low-voltage differential signals (MLVDS). The
term, differential, in this document refers to both LVDS and MLVDS signals unless otherwise specified.
This document contains signal information and specifications for the NI 6583R, which is composed of
an NI FlexRIO FPGA module and the NI 6583. This document also contains tutorial sections that
demonstrate how to acquire data using a LabVIEW FPGA example VI and how to create and run your
own LabVIEW project with the NI 6583R.
Contents
How to Use Your NI FlexRIO Documentation Set ............................................................................. 3
Front Panel and Connector Pinouts ..................................................................................................... 4
Pin and Signal Tables .......................................................................................................................... 5
Block Diagrams ................................................................................................................................... 7
Connecting Cables and Accessories .................................................................................................... 12
Using Accessories................................................................................................................................ 12
Using Your NI 6583R with a LabVIEW FPGA Example VI.............................................................. 17
Creating a LabVIEW Project and Running a VI on an FPGA Target ................................................. 19
NI 6583 Component-Level Intellectual Property (CLIP) .................................................................... 23
Specifications....................................................................................................................................... 25
Compliance and Certifications............................................................................................................. 29
Where to Go for Support ..................................................................................................................... 30
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Summary of Contents for National Instruments 6583R
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Page 1: Table Of Contents
NI 6583R User Guide and Specifications The NI 6583R is a single-ended and differential signaling device designed to work in conjunction with your NI FlexRIO™ FPGA module. The NI 6583 is available in two versions: one with low-voltage differential signals (LVDS) and another with multipoint low-voltage differential signals (MLVDS). The term, differential, in this document refers to both LVDS and MLVDS signals unless otherwise specified. - Page 2 NI 6583R Figure 1. NI 6583R Note NI 6583R refers to the combination of your NI 6583 adapter module and your NI FlexRIO FPGA module. NI 6583 refers only to your NI 6583 adapter module. NI 6583R User Guide and Specifications...
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Page 3: How To Use Your Ni Flexrio Documentation Set
Other useful information on ni.com Contains LabVIEW FPGA functions and intellectual property to share. ni.com/ipnet Contains product information and data sheets for NI FlexRIO devices. ni.com/flexrio These documents are also available at ni.com/manuals © National Instruments Corporation NI 6583R User Guide and Specifications... -
Page 4: Front Panel And Connector Pinouts
Connections that exceed any of the maximum ratings of input or output signals on the NI 6583R can damage the device and the chassis. NI is not liable for any damage resulting from such signal connections. For the maximum input and output ratings for each signal, refer to the Specifications section of this document. -
Page 5: Pin And Signal Tables
34, 36, 38, 40, 42, 44, 46, 48, 50, 54, 56, 58, 62, 66, 68 RESERVED 8, 52, 60 — These terminals are reserved for future use. Do not connect to these pins. © National Instruments Corporation NI 6583R User Guide and Specifications... - Page 6 34, 37, 40, 43, 46, 49, 52, 55, 58, 61, 64, 67, 70, 73 RESERVED 11, 12, 68, 69, 71, — These terminals are reserved for future use. Do not connect to these pins. NI 6583R User Guide and Specifications ni.com...
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Page 7: Block Diagrams
Block Diagrams Figures 4 through 7 show the data flow through the NI 6583R. Single-ended data lines use standardized voltage levels to interpret data as either a binary zero or a one in high-speed digital data transfers. Differential data lines provide a low-noise, low-power, low-amplitude differential method for high-speed digital data transfer. - Page 8 (GPIO Output) Output Enable from NI FlexRIO FPGA Module (GPIO Direction) DDC B CLK OUT Clock from 100 Ω NI FlexRIO FPGA Module DDC B CLK OUT (GPIO Output) Figure 7. Clock Output Signals NI 6583R User Guide and Specifications ni.com...
- Page 9 DIO 18 GPIO_27_n GPIO_27 DIO 19 GPIO_28_n GPIO_28 DIO 20 GPIO_11_n GPIO_11 DIO 21 GPIO_26_n_CC GPIO_26_CC DIO22 GPIO_30_n GPIO_30 DIO 23 GPIO_15_n GPIO_15 DIO 24 GPIO_29_n GPIO_29 DIO 25 GPIO_14_n GPIO_14 © National Instruments Corporation NI 6583R User Guide and Specifications...
- Page 10 (as enable) Note For the DIO and PFI lines, drive the GPIO Direction high for output and low for input. For CLK OUT, drive the GPIO Direction high for enable and low for disable. NI 6583R User Guide and Specifications ni.com...
- Page 11 DIO 15+/– GPIO_37_CC GPIO_36_n GPIO_37_n_CC PFI 1+/– GPIO_43_n GPIO_43 GPIO_44 PFI 2+/– GPIO_47 GPIO_46_n GPIO_46 PFI 3+/– GPIO_65_n GPIO_65 GPIO_64_n STROBE+/– GClk_LVDS — — CLK OUT+/– — GPIO_34_n GPIO_34 (as enable) © National Instruments Corporation NI 6583R User Guide and Specifications...
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Page 12: Connecting Cables And Accessories
NI 6583R using a shielded cable. If unshielded cables or accessories are not properly installed and shielded, the EMC specifications for the NI 6583R are no longer guaranteed. - Page 13 NI SMB-2163, respectively, using the NI SHC68-C68-D4 cable. NI PXI-1042 NI PXI-6551 50 MHz Digital I/O ACCESS ACTIVE PXI/PXI Express Chassis with NI 6583R NI CB-2162 Accessory NI SHC68-C68-D4 Cable Figure 8. Connecting the NI CB-2162 Accessory NI PXI-1042 NI PXI-6551...
- Page 14 The following figure shows the single-ended digital flying lead cable. Lead Pairs Removable Sleeving 68-Pin DDC A Connector Figure 10. Single-Ended Flying Lead Cable Parts Locator Diagram NI 6583R User Guide and Specifications ni.com...
- Page 15 NI SHB12X-B12X cable. NI PXI-1042 NI PXI-6561 100 MHz LVDS DIO ACCESS ACTIVE PXI/PXI Express Chassis with an NI 6583R NI SMA-2164 NI SHB12-B12X Cable Figure 11. Connecting the NI SMA-2164 Accessory © National Instruments Corporation NI 6583R User Guide and Specifications...
- Page 16 SHB12X-B12X shielded cable (192344-01), the NI 6583 pinout is reversed at the end connector. For example, the signal shown on pin 1 maps to pin 73 at the end connector. Refer to Front Panel and Connector Pinouts section in this document for more pinout information. NI 6583R User Guide and Specifications ni.com...
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Page 17: Using Your Ni 6583R With A Labview Fpga Example Vi
LabVIEW FPGA program. This section demonstrates how to use an existing LabVIEW FPGA example project to generate and acquire samples with the NI 6583R. This example requires the NI SHC68-C68-D4 and the NI SHB12X-B12X shielded cables and the appropriate accessories for your device. - Page 18 Constant, and DDC A Voltage Level controls. Click the Run button to run the VI. The NI 6583R generates a waveform on the even channels of your device and then acquires that waveform on the odd channels of your device. The front panel of the host VI displays both the generated and acquired waveforms, as shown in Figure 13.
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Page 19: Creating A Labview Project And Running A Vi On An Fpga Target
This section demonstrates how to create a LabVIEW project, an FPGA VI, and a host VI that acquires and generates single-ended data on the NI 6583R. This exercise also demonstrates how to compile the FPGA VI on your target and run a VI on the host machine. - Page 20 The LabVIEW FPGA Compile Server window opens and runs. The compilation takes several minutes. 24. When the compilation finishes, click the Stop Server button. 25. Click OK in the Successful Compile Report window. Close the VI without saving changes. NI 6583R User Guide and Specifications ni.com...
- Page 21 19. Wire the Read/Write Control function FPGA VI Reference Out indicator to the Close FPGA VI Reference function FPGA VI Reference In control. 20. Wire the Read/Write Control error out parameter to the Close FPGA VI Reference error in parameter. © National Instruments Corporation NI 6583R User Guide and Specifications...
- Page 22 Click the Stop button on the front panel and close the VI. Table 6. IO Module\Set Voltage Control IO Module\Set Voltage Control I/O Voltage 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V NI 6583R User Guide and Specifications ni.com...
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Page 23: Ni 6583 Component-Level Intellectual Property (Clip)
User-Defined Fixed I/O FPGA VI Module CLIP Socketed CLIP DRAM 1 DRAM 1 CLIP Socket CLIP Socket Socketed Socketed CLIP CLIP DRAM0 DRAM1 Figure 16. CLIP and FPGA VI Relationship © National Instruments Corporation NI 6583R User Guide and Specifications... - Page 24 NI 6583 and to your system. Refer to the NI FlexRIO Help for more information about NI FlexRIO CLIP items, configuring the NI 6583 with a socketed CLIP, and a list of available socketed CLIP signals. NI 6583R User Guide and Specifications ni.com...
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Page 25: Specifications
You must set the voltage after every power cycle prior to performing any operations. Typical data rate 1.8 V, 2.5 V, 3.3 V..........300 Mb/s 1.5 V...............280 Mb/s 1.2 V...............240 Mb/s © National Instruments Corporation NI 6583R User Guide and Specifications... - Page 26 LVDS Channels (DDC B) (Consistent with TI part number SN65LVDM180) Number of programmable I/O voltage levels ..None Power-up state............Drivers disabled, 100 Ω differential impedance with 300 kΩ to 3.3 V Typical data rate.............300 Mb/s NI 6583R User Guide and Specifications ni.com...
- Page 27 1.2 V 480 mV 650 mV Output impedance ..........100 Ω differential, nominal Output protection ...........Each channel can indefinitely sustain a short to any voltage between −1.4 V and 3.8 V. © National Instruments Corporation NI 6583R User Guide and Specifications...
- Page 28 Relative humidity range .........5% to 95%, noncondensing. Tested in accordance with IEC 60068-2-56. Note Clean the device with a soft, non-metallic brush. Make sure that the device is completely dry and free from contaminants before returning it to service. NI 6583R User Guide and Specifications ni.com...
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Page 29: Compliance And Certifications
EMI gaskets (NI part number 746228-01) to both sides of your NI 6583 before use. CE Compliance This product meets the essential requirements of applicable European Directives as follows: • 2006/95/EC; Low-Voltage Directive (safety) • 2004/108/EC; Electromagnetic Compatibility Directive (EMC) © National Instruments Corporation NI 6583R User Guide and Specifications... -
Page 30: Where To Go For Support
National Instruments corporate headquarters is located at 11500 North Mopac Expressway, Austin, Texas, 78759-3504. National Instruments also has offices located around the world to help address your support needs. For telephone support in the United States, create your service request at ni.com/ support and follow the calling instructions or dial 512 795 8248. - Page 31 For patents covering National Instruments products/technology, refer to the appropriate location: Help»Patents in your software, the patents.txt file on your media, or the National Instruments Patent Notice at ni.com/patents. Refer to the Export Compliance Information at ni.com/legal/ export-compliance for the National Instruments global trade compliance policy.