National Instruments 653 Series User Manual page 71

For traditional ni-daq. high-speed digital i/o devices for pci, pxi, compactpci, at, eisa, and pcmcia bus systems
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Chapter 3
Timing Diagrams
ACK
REQ
Data In Valid
Data Out Valid
Parameter
Input Parameters
t
REQ low duration
r*r
t
REQ high duration
rr*
t
ACK falling edge to REQ rising edge
a*r
t
Input data valid to REQ rising edge
dir
t
REQ rising edge to input data invalid
rdi
Output Parameters
t
ACK high duration
aa*
t
REQ falling edge to ACK rising edge
r*a
t
Output data valid to ACK falling edge
doa*
t
REQ rising edge to output data invalid
rdo
All timing values are in nanoseconds.
NI 653X User Manual
t
a*r
t
r*a
t
r*r
t
doa*
Description
Figure 3-13. 8255-Emulation Input/Output Timing Diagram
3-16
t
aa*
t
rr*
t
t
rdi
dir
t
rdo
ACK and REQ are shown as active low
Minimum
75
75
0
0
10
100
25
100
Maximum
150
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