Related Manuals for National Instruments 6527 Series
Summary of Contents for National Instruments 6527 Series
- Page 1 6527 Register-Level Programmer Manual 6527 Register-Level Programmer Manual September 2001 Edition Part Number 370106B-01...
- Page 2 Sweden 08 587 895 00, Switzerland 056 200 51 51, Taiwan 02 2528 7227, United Kingdom 01635 523545 For further support information, see the Technical Support Resources appendix. To comment on the documentation, send e-mail to techpubs@ni.com. © 2001 National Instruments Corporation. All rights reserved.
- Page 3 The reader should consult National Instruments if errors are suspected. In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it.
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Page 4: Table Of Contents
Initializing the PCI Local Bus ..................3-2 Initializing the PCI for the PC .................3-2 Example ....................3-3 Initializing the PCI for the Macintosh (PCI-6527 Only).........3-4 Example ....................3-4 Programming the Digital I/O Circuitry................3-5 Input.........................3-5 Input with Filtering ................3-6 Output ......................3-6 © National Instruments Corporation 6527 Register-Level Programmer Manual... - Page 5 Contents Change Notification ..................3-7 Configuring Interrupt Generation ............. 3-7 Handling Interrupts................3-8 Disabling Change Notification ............3-8 Appendix A Technical Support Resources Glossary Index 6527 Register-Level Programmer Manual ni.com...
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Page 6: About This Manual
LabVIEW, Measurement Studio, or NI-DAQ, you do not need to read this manual. Note National Instruments strongly recommends using application development environment software, such as LabVIEW, Measurement Studio, or NI-DAQ to program your 6527 device. Application software provides easier programming with the same flexibility as register-level programming. -
Page 7: Conventions
About This Manual Conventions The following conventions are used in this manual: <> Angle brackets that contain numbers separated by an ellipsis represent a range of values associated with a bit or signal name—for example, DIG+0.<3..0>. This icon denotes a tip, which alerts you to advisory information. This icon denotes a note, which alerts you to important information. -
Page 8: Getting To Know Your 6527
Using your 6527 device in a way inconsistent with the directions in the 6527 User Caution Manual can lead to equipment damage or injury. National Instruments is not liable for damage or injuries resulting from incorrect use. Using Your 6527 The 6527 circuitry can be divided into the following functional groups: •... -
Page 9: General Operation Registers
Chapter 1 Getting to Know Your 6527 General Operation Registers Initialize the PCI interface before using the general operation registers. Read the ID Register, one of the general operation registers, to verify the PCI interface is initialized properly. For more information on the ID Register, refer to the ID Register section in Chapter 2, Register Map and... -
Page 10: Register Map And Descriptions
Filter Interval 08:0A Read and write Three 8-bit Filter Enables, Port 0 Read and write 8-bit Filter Enables, Port 1 Read and write 8-bit Filter Enables, Port 2 Read and write 8-bit © National Instruments Corporation 6527 Register-Level Programmer Manual... - Page 11 Chapter 2 Register Map and Descriptions Table 2-1. 6527 Register Address Map (Continued) Offset Register Name (Hex) Type Size Change Notification Registers Read-only 8-bit Change Status Master Interrupt Control Read and write 8-bit Port 0 Rising-Edge Detection Enable Read and write 8-bit Port 1 Rising-Edge Detection Enable Read and write...
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Page 12: Input Registers (Ports 0-2)
Data—These are the eight input data bits of input Port N, where N is 0, 1, or 2, from bit 7 down to bit 0. 1 = Logic high: voltage and/or current present 0 = Logic low: voltage and/or current absent © National Instruments Corporation 6527 Register-Level Programmer Manual... -
Page 13: Output Registers (Ports 3-5)
Chapter 2 Register Map and Descriptions Output Registers (Ports 3–5) The Output Registers are read and write. Write to an Output Register to control the switch states of the eight solid-state relays on the corresponding port. Read an Output Register to get the states of the eight relays associated with the port. -
Page 14: Id Register
Reading this register returns the hexadecimal value 27. Address Offset: 06 (hex) Type: Read-only Size: 8-bit Bit Map: Name Description 7–0 ID<7..0> These bits return hex 27, indicating a 6527 device. © National Instruments Corporation 6527 Register-Level Programmer Manual... -
Page 15: Clear Register
Chapter 2 Register Map and Descriptions Clear Register Write to the Clear Register to reset one or more functions of the 6527 device. The data you write to the clear register selects the function or functions you want to reset. Each bit set to 1 in the data resets one function. -
Page 16: Filter Interval Registers
FI.7 FI.6 FI.5 FI.4 FI.3 FI.2 FI.1 FI.0 Name Description 23–20 Reserved Write only zeroes to these bits. 19–0 FI.<19..0> Filter interval, bits 19 down to 0, in increments of 200 ns. © National Instruments Corporation 6527 Register-Level Programmer Manual... -
Page 17: Filter Enables (Ports 0-2)
Chapter 2 Register Map and Descriptions Filter Enables (Ports 0–2) These registers enable filtering for the input ports. You can enable or disable filtering individually for each input line. Address Offsets: 0C (hex) for Port 0 0D (hex) for Port 1 0E (hex) for Port 2 Type: Read and write... -
Page 18: Change Status Register
EdgeStatus Indicates an edge has been detected. If the EdgeInt bit is set in the Master Interrupt Control Register, EdgeStatus set indicates an interrupt is currently being asserted. © National Instruments Corporation 6527 Register-Level Programmer Manual... -
Page 19: Master Interrupt Control Register
Chapter 2 Register Map and Descriptions Master Interrupt Control Register The Master Interrupt Control Register enables change detection interrupts. To select the line to use for changes, use the Rising Edge Detection and Falling Edge Detection Registers. Address Offsets: 15 (hex) Type: Read and write Size:... - Page 20 Interrupt Enable control. Enable overflow interrupt. 1 = Interrupt enabled 0 = Interrupt disabled EdgeIntEnable Edge Interrupt Enable control. Enable edge detection interrupt. 1 = Interrupt enabled 0 = Interrupt disabled © National Instruments Corporation 2-11 6527 Register-Level Programmer Manual...
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Page 21: Rising-Edge Detection Registers (Ports 0-2)
Chapter 2 Register Map and Descriptions Rising-Edge Detection Registers (Ports 0–2) These registers enable edge detection interrupts for rising edges on selected lines of input ports. To generate interrupts you must also set the EdgeInt bit in the Master Interrupt Control Register. -
Page 22: Falling-Edge Detection Registers (Ports 0-2)
Fall.1 Fall.0 Name Description 7–1 Fall.<7..0> Falling-Edge Detection enables—Each bit enables interrupt generation on falling edges of the corresponding input line. 1 = Falling-edge detection enabled 0 = Falling-edge detection disabled © National Instruments Corporation 2-13 6527 Register-Level Programmer Manual... -
Page 23: Programming
(Base Address + 0x05) Address of ID Register (Base Address + 0x06) Clear Register Address of Clear Register (Base Address + 0x07) Filter Interval Address of Filter Interval Registers (Base Address + 0x08) © National Instruments Corporation 6527 Register-Level Programmer Manual... -
Page 24: Initializing The Pci Local Bus
Chapter 3 Programming Port N Filter Enables Address of Input Port N Filter Enables (Base Address + 0x0C + N, where N is the port number) Change Status Address of Change Status Register (Base Address + 0x14) Master Interrupt Control Address of Master Interrupt Control Register (Base Address + 0x15) Port N Rising-Edge Detection... -
Page 25: Example
//Write the window data value to offset 0xC0 from the new PCI MITE address. If you are not re-mapping the device, then the new PCI MITE address is the value in BAR0. © National Instruments Corporation 6527 Register-Level Programmer Manual... -
Page 26: Initializing The Pci For The Macintosh (Pci-6527 Only)
Chapter 3 Programming The base address is now 0xD1000. Make sure the re-mapped PCI MITE and the 6527 memory ranges are not used by another device or system resource. You can exclude this memory from use with a memory manager. Initializing the PCI for the Macintosh (PCI-6527 Only) To program at the register level, you must know the base memory address and you must develop your own configuration program. -
Page 27: Programming The Digital I/O Circuitry
//Read eight bits from Port 0 For example, if you read 0x01, or binary 00000001, this indicates a logic high on Port 0, line 0, and a logic low on lines 1 through 7 of Port 0. © National Instruments Corporation 6527 Register-Level Programmer Manual... -
Page 28: Input With Filtering
Chapter 3 Programming Input with Filtering You have the option to set filter enable bits and a filter period before performing input. The following example enables filtering with an interval of 10 ms for Port 0 (all lines). To use filtering, set the filter enable bits for the lines you want to filter. Then set a filter interval, which is common to all lines. -
Page 29: Change Notification
Write (Filter Interval + 2,0x00) //Set most significant bits of filter interval Write (Filter Interval + 1,0xC3) //Set the intermediate bits of filter interval Write (Filter Interval + 0,0x50) //Set least significant bits of filter interval © National Instruments Corporation 6527 Register-Level Programmer Manual... -
Page 30: Handling Interrupts
Chapter 3 Programming Write (Clear Register,0x03) //Clear filters and filter interval clock Write (Port 0 Filter Enables, 0xFF) //Enable filter for eight bits of Port 0 2. Set the Edge Detection Enable bits for the lines and edges you want to detect. Write (Port 0 Rising Edge Detection, 0xF2) //Rises to detect: lines 7 down to 4 and line 1 Write (Port 0 Falling Edge Detection, 0xF1) //Falls to detect: lines 7 down to 4 and line 0 Write to the Clear Register to clear any existing interrupts before you begin. -
Page 31: Technical Support Resources
Technical Support Resources Web Support National Instruments Web support is your first stop for help in solving installation, configuration, and application problems and questions. Online problem-solving and diagnostic resources include frequently asked questions, knowledge bases, product-specific troubleshooting wizards, manuals, drivers, software updates, and more. Web support is available through the Technical Support section of ni.com... - Page 32 Appendix A Technical Support Resources Worldwide Support National Instruments has offices located around the world to help address your support needs. You can access our branch office Web sites from the Worldwide Offices section of . Branch office Web sites provide ni.com...
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Page 33: Glossary
PCI Industrial Computer Manufacturer’s Group (PICMG) data acquisition—a system that uses the personal computer to collect, measure, and generate electrical signals DIG+ positive data terminal DIG– negative data terminal digital input/output © National Instruments Corporation 6527 Register-Level Programmer Manual... - Page 34 Glossary isolation signal conditioning to break ground loops and reject high common-mode voltages to protect equipment and users and to ensure accurate measurements least significant bit most significant bit optical isolation the technique of using an optocoupler to transfer data without electrical continuity, to eliminate high-potential differences and transients optocoupler a device that transfers electrical signals by utilizing light waves to provide...
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Page 35: Index
ClrOverflow bit, Clear Register, 2-6 Falling-Edge Detection Registers configuring interrupt generation, 3-7 to 3-8 (Ports 0–2), 2-13 conventions used in manual, viii FallingEdgeIntEnable bit, Master Interrupt customer education, A-1 Control Register, 2-10 © National Instruments Corporation 6527 Register-Level Programmer Manual... - Page 36 Index FE<7..0> bits, Filter Interval Registers, 2-8 Filter Enables (Ports 0–2) Register, 2-8 N.<7..0> bits Filter Interval Registers, 2-7 Input Registers (Ports 0–2), 2-3 FL<19..0> bits, Filter Interval Registers, 2-7 Output Registers (Ports 3–5), 2-4 NI Developer Zone, A-1 general operation registers Clear Register, 2-6 output, programming, 3-6 ID Register, 2-5...
- Page 37 A-1 to A-2 register address map (table), 2-2 Rising-Edge Detection Registers (Ports 0–2), 2-12 digital filtering registers Web support from National Instruments, A-1 Filter Enables (Ports 0–2), 2-8 Worldwide technical support, A-2 Filter Interval Registers, 2-7 register address map (table), 2-1...