Agilent Technologies 81250 System Programming Manual And Scpi Reference page 175

Parallel bit error ratio tester
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Commands in DSR Application Subsystems
Return Value
Return Value
Description
Parameters
174
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:<Handle>:SGENeral:GLOBal:TRIGger[:
SEQuence][:LAYer][:SOURce]?
Syntax
:<Handle>:SGENeral:GLOBal:TRIGger[:SEQuence][:LAYer][:SOURce]?
This query returns the actual status of the clock/reference input of the
central clock module. For possible values, see ":<Handle>:SGENeral:
GLOBal:TRIGger[:SEQuence][:LAYer][:SOURce]" on page 173.
Example
:_test:SGEN:GLOB:TRIG?
might return:
EXT5
:<Handle>:SGENeral:GLOBal:TRIGger[:
SEQuence][:LAYer][:SOURce]:CDRList?
Syntax
:<Handle>:SGENeral:GLOBal:TRIGger[:SEQuence][:LAYer][:SOURce]:
CDRList?
Returns the list of channels that have CDR (Clock Data Recovery)
capabilities.
Example
:_test:SGEN:GLOB:TRIG:CDRL?
might return:
= (@0104001,0103001)
:<Handle>:SGENeral:GLOBal:TRIGger[:
SEQuence][:LAYer][:SOURce]:CDR
Syntax
:<Handle>:SGENeral:GLOBal:TRIGger[:SEQuence][:LAYer][:SOURce]:CDR
<channel>
Specifies which channel recovers the clock from the data stream
(while operating in CDR mode). CDR mode is set using ":<Handle>:
SGENeral:GLOBal:TRIGger[:SEQuence][:LAYer][:SOURce]" on
page 173.
<channel>
Defines the channel in the form "GGMMCCC", where GG
is the clockgroup, MM the module and CCC the channel number.
Example
:_test:SGEN:GLOB:TRIG CDR
:_test:SGEN:GLOB:TRIG:CDR "0103001"
Agilent 81250 Parallel Bit Error Ratio Tester, Programming Reference, March 2006
:SGENeral:GLOBal:TRIGger Subsystem

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