Communication Through Direct Access - Mitsubishi Electric MELSEC iQ-R-R00CPU User Manual

Melsec iq-r series cpu module application user's manual
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Communication through direct access

This method uses programs to communicate with other CPU modules. The following table lists the communications using the
direct access method.
Communication method
Communication using CPU buffer memory
Communication using the fixed scan
communication area
Communication by a dedicated instruction
Specification method thorough CPU buffer memory access device
Specify the CPU buffer memory as "U3En\Gn" or the fixed scan communication area as "U3En\HGn" when accessing the
memory or area. ( Page 352 CPU Buffer Memory Access Device)
CPU No.1
U3E0\G0
CPU
buffer memory
U3E0\G8000
Send area
of CPU No.1
Receive area
of CPU No.2
Receive area
of CPU No.3
■Obtaining information stored on the CPU buffer memory
Access the CPU buffer memory.
■Obtaining information stored on the fixed scan communication area for other CPUs
Access the fixed scan communication area on the host CPU module. Obtain data sent to the fixed scan communication area
on the host CPU module at the fixed scan communication cycle.
Description
Data between CPU modules are transferred using
any area on the CPU buffer memory.
Data between CPU modules are transferred using
the fixed scan communication area.
Data between CPU modules in the multiple CPU
system are transferred and/or control commands
are sent to other CPU modules by using a
dedicated instruction.
Host CPU module
CPU No.2
(U3E1\)*1 G0
CPU
buffer memory
U3E0\HG0
Receive area
of CPU No.1
U3E0\HG1024
(U3E1\)*1 HG0
Send area
of CPU No.2
U3E2\HG0
Receive area
of CPU No.3
U3E2\HG1024
Instruction to be used
• FROM/TO instruction
• DFROM/DTO instruction
• Instruction using the CPU buffer memory access
device (U3En\G)
Instruction using the CPU buffer memory access
device (U3En\HG)
DDWR/DDRD instruction and others
Acquire information
on other CPU
modules.
U3E2\G0
U3E2\G8000
16 MULTIPLE CPU SYSTEM FUNCTION
16.4 Data Communication Between CPU Modules
CPU No.3
16
CPU
buffer memory
Receive area
of CPU No.1
Receive area
of CPU No.2
Send area
of CPU No.3
309

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