System Information - Mitsubishi Electric MELSEC iQ-R-R00CPU User Manual

System information

The following is the list of special relay areas relating to the system information.
No. Name
SM203 STOP contact
SM204 PAUSE contact
SM210 Clock data set request
SM211 Clock data set error
SM213 Clock data read request
SM217 Daylight saving time status
flag
SM220 CPU No.1 preparation
completed
SM221 CPU No.2 preparation
completed
SM222 CPU No.3 preparation
completed
SM223 CPU No.4 preparation
completed
SM230 No.1 CPU error flag
SM231 No.2 CPU error flag
SM232 No.3 CPU error flag
SM233 No.4 CPU error flag
APPX
806
Appendix 4 List of Special Relay Areas
Data stored Details
Off: Other than STOP state This relay is on in STOP state.
On: STOP state
Off: Other than PAUSE This relay is on in PAUSE state. Note that
state this relay is on during the END processing of
On: PAUSE state the scan which the specified PAUSE contact
turns on if PAUSE state is generated at the
PAUSE contact.
OffOn:setting request is • Clock data stored in SD210 to SD216 is
detected
OnOff:setting is completed
• This relay switches from on to off when
Off: No error This relay switches to on when an error is
On: Error generated in values from SD210 to SD216,
and to off when no error is generated.
Off: Non-processing Clock data is loaded into SD210 to SD216
On: Reading request when this relay is in the ON state.
Off: Not during daylight Turns on if during daylight saving time with
saving time daylight saving time function. Turns off if not
On: During daylight saving during daylight saving time.
time
Off: Not completed • This relay switches to on at the time when
On: Completed
• This relay is used as an interlock to
Off: CPU No.n normal • This relay is off when the CPU module for
On: CPU No.n stop error
state
• This relay is on when the CPU module for
written into the CPU module when this
relay is switched from off to on.
writing of clock data stored in SD210 to
SD216 into the clock element is
completed.
access from the CPU module on other
CPUs to the CPU module for CPU No. n
is enabled during power-on or resetting.
access the CPU module for the CPU No.
n when the multiple CPU synchronization
setting is configured to asynchronous
mode.
the CPU No.n is normal (including a
continuation error period).
the CPU No.n is in stop error state.
Set by (setting timing) CPU
S (Status change) ALL
S (Status change) ALL
U/S (Status change) ALL
S (Request) ALL
U ALL
S (Status change) Rn
S (Status change) ALL
ALL
ALL
ALL
S (Status change) ALL
ALL
ALL
ALL
*1