Panasonic FP-E Programming Manual page 747

Fp series
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FP0/FP−e
5
F168
(SPD1)
Outline
Outputs a pulse from the specified output (Y0 or Y1) according to the
specified parameter.
Program example
Trigger
R0
10
F168 SPD1 , DT100 , K 0
S
n
Operands
Relay
Operand
Operand
WX WY WR
S
N/A N/A N/A
n
N/A N/A N/A
Description
When the corresponding control flag is off and the execution condition (trigger) is in the on state, a pulse is
output from the specified output (Y0 or Y1).
The control code, initial speed, maximum speed, and acceleration/deceleration time are specified by a user
program with a data table as shown on the following page.
The frequency is switched by the acceleration/deceleration time specified for changing from the initial speed
to the maximum speed. During deceleration (normally 30 steps), the frequency is changed based on the
same slope as during acceleration.
Table of areas used
Channel
Control
Elapsed value area
no.
flag
DT9044, DT9045
(For FP0 T32,
ch0
R903A
DT90044, DT90045)
DT9048, DT9049
ch1
R903B
(For FP0 T32,
DT90048, DT90049)
Notes
When this instruction is used, the setting for the channel
corresponding to system register 400 should be set to
"High−speed counter not used".
By performing rewrite during RUN during pulse output, more
than the set number of pulses may be output.
Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com
Positioning control
(home position return)
Ladder Diagram
Ladder Diagram
S
n
Starting address for the area that contains the data table.
Output Yn that corresponds to the pulse output (n: K0 or K1).
Timer/Counter Register
SV
EV
DT
N/A
N/A
A
N/A
N/A
N/A
Target value area
DT9046, DT9047
(For FP0 T32,
DT90046, DT90047)
DT9050, DT9051
(For FP0 T32,
DT90050, DT90051)
Index
Constant
register
modifier
modifier
IX
IY
K
H
N/A
N/A
N/A
N/A
N/A
N/A
A
A
Directional
output
Y2
Y3
High−level Instructions
Availability
FP0/FP−e
Boolean
Address
Instruction
10
ST
R
11
F168
(SPD1)
DT
100
K
Index
A
A:
Available
N/A
N/A: Not Available
Home
Near home input
input
DT9052 bit2
(For FP0 T32,
X0
DT90052)
DT9052
(For FP0 T32,
X1
DT90052)
3 − 483
0
0

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