Ppg Output Operation - Fujitsu F2MC-16LX Hardware Manual

12.4.2 PPG Output Operation

In the 8/16-bit PPG, the PPG unit on ch.0 is activated and starts counting when the
PEN0 bit of the PPGC0 register is set to "1". The PPG unit on ch.1 is activated and
starts counting when the PEN1 bit of the PPGC1 register is set to "1". At the start of
an operation, a counting operation is stopped by writing "0" to the PEN0 bit of the
PPGC0 register or PEN1 bit of the PPGC1 register. After the counting operation stops,
the pulse output is held low.
■ PPG Output Operation
In PPG output operation, observe the following two precautions:
• In the 8-bit prescaler + 8-bit PPG mode, do not enable ch.1 operation while ch.0 is in the
stopped state.
• In the 16-bit PPG mode, perform start and stop control by manipulating the PEN0 bit of the
PPGC0 register and the PEN1 bit of the PPGC1 register at the same time.
During PPG operation, a pulse waveform is output successively with an arbitrary frequency and
an arbitrary duty cycle. Once the PPG starts outputting a pulse waveform, it does not stop until
the operation is set to stop.
Figure 12.4-1 Output Waveform During PPG Output Operation
PEN
Output pin
PPG
(Start)
Start of operation by PEN
(starting with the L level)
T (L+1) T (H+1)
12.4 8/16-Bit PPG Operation
L:
PRLL value
H: PRLH value
T: Down counter clock cycle (1/φ, 2/φ, 4/φ, 8/φ, 16/φ)
or input from timer base counter
(by clock select in PPGC)
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