Pin Control Register (Pcr); Pin Control Register (Pcr) Field Descriptions - Texas Instruments TMS320C6000 Reference Manual

11.12

Pin Control Register (PCR)

Figure 59. Pin Control Register (PCR)
31
15
Reserved
R-0
7 6
Reserved † CLKSSTAT
R-0 R-0
Legend: R = Read only; R/W = Read/Write; -n = value after reset
†
If writing to this field, always write the default value of 0 to ensure proper McBSP operation.
Table 33. Pin Control Register (PCR) Field Descriptions
Bit †
field
31−14 Reserved
13 XIOEN
†
For CSL implementation, use the notation MCBSP_PCR_field_symval
SPRU580C
The serial port is configured via the serial port control register (SPCR) and the
pin control register (PCR). The PCR is also used to configure the serial port
pins as general-purpose inputs or outputs during receiver and/or transmitter
reset (for more information see section 10). The PCR contains McBSP status
control bits. The PCR is shown in Figure 59 and described in Table 33.
14 13 12
XIOEN RIOEN
R/W-0 R/W-0
5 4
DXSTAT DRSTAT
R/W-0 R-0
† Value
symval
− 0
SP 0
GPIO 1
Reserved
R-0
11
FSXM FSRM
R/W-0 R/W-0
3
FSXP
R/W-0 R/W-0
Description
Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
Transmit general-purpose I/O mode only when transmitter is
disabled (XRST = 0 in SPCR).
DX, FSX, and CLKX pins are configured as serial port pins
and do not function as general-purpose I/O pins.
DX pin is configured as general-purpose output pin; FSX
and CLKX pins are configured as general-purpose I/O pins.
These serial port pins do not perform serial port operations.
Multichannel Buffered Serial Port (McBSP)
10 9
CLKXM
R/W-0
2 1
FSRP CLKXP
R/W-0
Registers
16
8
CLKRM
R/W-0
0
CLKRP
R/W-0
111