Control Register File Extensions - Texas Instruments TMS320C6000 Series Reference Manual

2.7 TMS320C67x Extensions to the Control Register File
Table 2–7. Control Register File Extensions
Register
Abbreviation
FADCR Floating-point adder configura-
tion register
FAUCR Floating-point auxiliary configu-
ration register
FMCR Floating-point multiplier config-
uration register
The 'C67x has three additional configuration registers to support floating point
operations. The registers specify the desired floating-point rounding mode for
the .L and .M units. They also contain fields to warn if src1 and src2 are NaN
or denormalized numbers, and if the result overflows, underflows, is inexact,
infinite, or invalid. There are also fields to warn if a divide by 0 was performed,
or if a compare was attempted with a NaN source. Table 2–7 shows the addi-
tional registers used by the 'C67x. The OVER, UNDER, INEX, INVAL, DENn,
NANn, INFO, UNORD and DIV0 bits within these registers will not be modified
by a conditional instruction whose condition is false.
Name
TMS320C67x Extensions to the Control Register File
Description
Specifies underflow mode, rounding mode, NaNs,
and other exceptions for the .L unit.
Specifies underflow mode, rounding mode, NaNs,
and other exceptions for the .S unit.
Specifies underflow mode, rounding mode, NaNs,
and other exceptions for the .M unit.
CPU Data Paths and Control
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