32-Bit Bit Reversal: Rwdrevrs, Xwdrevrs; Clocking And Framing Examples; Multiphase Frame Example: Ac97; Ac97 Dual-Phase Frame Format - Texas Instruments TMS320C6000 Reference Manual

Clocks, Frames, and Data
4.5.7

32-Bit Bit Reversal: RWDREVRS, XWDREVRS

4.6

Clocking and Framing Examples

4.6.1

Multiphase Frame Example: AC97

Figure 15.

AC97 Dual-Phase Frame Format

P1E1
FS(R/X)
1-bit data delay
Á
D(R/X)
Á
Legend: PxEy = phase x and element y.
38 Multichannel Buffered Serial Port (McBSP)
The 32-bit bit reversal feature is only available on the C621x/C671x/C64x
DSP. Normally all transfers are sent and received with the MSB first. However,
you can reverse the receive/transmit bit ordering of a 32-bit element (LSB first)
by setting all of the following:
(R/X)WDREVRS = 1 in the receive/transmit control register (RCR/XCR).
-
(R/X)COMPAND = 01b in RCR/XCR.
-
(R/X)WDLEN(1/2) = 101b in RCR/XCR to indicate 32-bit elements.
-
When you set the register fields as above, the bit ordering of the 32-bit element
is reversed before being received by or sent from the serial port. If the
(R/W)WDREVRS and (R/X)COMPAND fields are set as indicated above, but
the element size is not set to 32-bit, operation is undefined.
Figure 15 shows an example of the Audio Codec '97 (AC97) standard, which
uses the dual-phase frame feature. The first phase consists of a single 16-bit
element. The second phase consists of 12 20-bit elements. The phases are
configured as follows:
(R/X)PHASE = 1b: specifying a dual-phase frame
-
(R/X)FRLEN1 = 0b: specifying one element per frame in phase 1
-
(R/X)WDLEN1 = 010b: specifying 16 bits per element in phase 1
-
(R/X)FRLEN2 = 000 1011b: specifying 12 elements per frame in phase 2
-
(R/X)WDLEN2 = 011b: specifying 20 bits per element in phase 2
-
CLK(R/X)P = 0: specifying that the receive data sampled on the falling
-
edge of CLKR and the transmit data are clocked on the rising edge of CLKX
FS(R/X)P = 0: indicating that active frame sync signals are used
-
(R/X)DATDLY = 01b: indicating a data delay of one bit clock
-
P2E1 P2E2 P2E3 P2E4
16 bits
20 bits
P2E5 P2E6 P2E7 P2E8 P2E9 P2E10 P2E11 P2E12
SPRU580C