Input Signal Processing Theory; Color Light Sequencing Processing; Dmd Chip Operation - BenQ MP611 Product Service Manual

2.3 Color Light Sequencing Processing

Color light sequencing processing circuit consists of Motor driver, Motor phase synchronization, Light source
control and synchronization.
(1) Motor driver drives the color wheel motor. The motor is three phase, 8, 12 or 16 pole, Y configuration, brushless
DC motor.
(2) Motor phase synchronization circuit uses the CWINDEX to phase and frequency lock the color wheel to a multiple
of Vertical sync (Vsync). Sequences are typically designed for the clock to run at 1.5X, 2X, 2.5X and 3X the Vsync
rate. The DDP ASIC electronics phases the display of the data on the DMD based on the CWINDEX signal. The
CWINDEX typically indicates the beginning of the red light on the DMD device. The DDP ASIC electronics can be
configured to delay the CWINDEX. This is useful for electronic alignment of the color wheel. The CWINDEX
signal is generated by color wheel sensor board that was attached around the motor hub.
(3) Light source control and synchronization circuit provides a lamp enable (LAMPEN) signal to control the projector
lamp and ballast. The LAMPEN is used for on/off control as well as synchronization of AC lamps. The
LAMPLITZ signal shall be asserted to the DDP ASIC circuits after successful ignition of the lamp. See Figure 7 for
detailed timing on the LAMPLITZ during power up. Note there is strong EMI noise when igniting the lamp, at that
period system should not execute any action.

2.4 DMD Chip Operation

The DDP ASIC provides the 64 data lines and the control signals to the DMD. These signals
control the loading of data into the DMD memory cells. The DDP ASIC is responsible for the
proper timing between the memory load operation and the Reset operation for DMD chip.
Chapter 3 Input Signal Processing Theory
3.1 Overview
Figure 7 Lamp control Timing
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