Integra DTR-8.8 Service Manual page 157

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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -91
U8067: LP2996MX (DDR-SDRAM Termination Regulator)
BLOCK DIAGRAM
PIN CONFIGURATION
TE
L 13942296513
TERMINAL DESCRIPTION
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PIN
AVIN AND PVIN AVIN and PVIN are the input supply pins for the LP2996.
AVIN is used to supply all the internal control circuitry.
VDDQ is the input used to create the internal reference
VDDQ
voltage for regulating V
from a resistor divider of two internal 50 kohm resistor.
V
The purpose of the sense pin is to provide improved remote
SENSE
load regulation.
SHUTDOWN The LP2996 contains an active low shutdown pin that can be
used to tri-state V
V provides the buffered output of the internal reference
V
REF
REF
voltage VDDQ / 2.
V
V is the regulated output that is used to terminate the bus
TT
TT
resistors. It is capable of sinking and sourcing current while
regulating the output precisely to VDDQ / 2.
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DESCRIPTION
. The reference voltage is generated
TT
.
TT
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TX-NR905/NA905
9 4 2 8
0 5 8 2 9 9 4 2 8
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