Integra DTR-8.8 Service Manual page 151

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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -85
Q212: M29W128FL70 (128 Mbit Flash Memory)
TERMINAL DESCRIPTION
1. Address Inputs (A0-A22)
The Address Inputs select the cells in the memory array to access during Bus Read
operations.
2. Data Inputs/Outputs (DQ0-DQ7)
The Data I/O outputs the data stored at the selected address during a Bus Read operation.
3. Data Inputs/Outputs (DQ8-DQ14)
The Data I/O outputs the data stored at the selected address during a Bus Read operation.
4. Data Input/Output or Address Input (DQ15A-1)
When the device is in x16 Bus mode, this pin behaves as a Data Input/Output pin (as DQ8-
DQ14). When the device is in x8 Bus mode, this pin behaves as an address pin; DQ15A-1.
5. Chip Enable (E)
The Chip Enable pin, E, activates the memory, allowing Bus Read and Bus Write operations.
6. Output Enable (G)
The Output Enable pin, G, controls the Bus Read operation of the memory.
7. Write Enable (W)
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8. V PP/ Write Protect (V PP /WP)
9. Reset/Block Temporary Unprotect (RP)
10. Ready/Busy Output (RB)
11. Byte/Word Organization Select (BYTE)
12. V CC supply voltage (7V to 3.6V)
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The Write Enable pin, W, controls the Bus Write operation of the memory's Command
Interface.
The V /Write Protect pin provides two functions. The V
PP
use an external high voltage power supply to reduce the time required for Program
operations.
The Write Protect function provides a hardware method of protecting the highest or lowest
block.
The Reset/Block Temporary Unprotect pin can be used to apply a Hardware Reset to the
memory or to temporarily unprotect all the blocks previously protected using a High Voltage
The Ready/Busy pin is an open-drain output that can be used to identify when the device is
performing a Program or erase operation.
It is used to switch between the x8 and x16 Bus modes of the memory.
V provides the power supply for all operations (Read, Program and Erase).
CC
V is the reference for all voltage measurements.
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