Integra DTR-8.8 Service Manual page 145

QQ
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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -79
Q211: RTL8100CL (Ethernet Controller with Power Management)
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
TE
L 13942296513
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
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TX+
TX-
AVDD33
GND
RX+
RX-
AVDD33
CTRL25
NC
NC
NC
AVDD25
NC
NC
NC
NC
GND
NC
NC
AVDD33(REG)
GND
NC
ISOLATEB
NC
INTAB
VDD33
PCIRSTB
PCICLK
GNTB
REQB
PMEB
VDD25
AD31
AD30
GND
AD29
AD28
GND
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2 9
8
Q Q
3 6 7 1 3 1 5
co
.
TX-NR905/NA905
9 4 2 8
102
AD2
101
GND
100
GND
99
VDD25
98
AD3
97
AD4
96
AD5
95
AD6
94
VDD33
93
AD7
92
CBEB0
91
GND
90
AD8
89
AD9
88
NC
87
AD10
86
AD11
85
AD12
84
VDD33
83
AD13
82
AD14
0 5 8 2 9 9 4 2 8
81
GND
80
GND
79
AD15
78
VDD25
77
CBEB1
76
PAR
75
SERRB
74
NC
73
NC
72
NC
71
VDD33
70
PERRB
69
STOPB
68
DEVSELB
67
TRDYB
66
GND
65
CLKRUNB
m
9 9
9 9