Integra DTR-8.8 Service Manual page 141

QQ
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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -75
Q206: ENVY24MT (PCI Multi-channel Audio Controller)
BLOCK DIAGRAM
DAC/Codec
2
I S
or
AC-Link Out
2x24b ch.
PDMAx
PDMAi
TE
L 13942296513
PIN CONFIGURATION
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ADC/Codec
S/PDIF DAC
or S/PDIF In
Out
I
2
IEC958 Out I S Out
AC-Link In
2x24b ch.
PDMA4
RDMA0
PCI 2.2 Bus Master BIU with Burst Mode
MTNC
97
MTNC 98
MTEST[0]
99
GND 100
MTEST[1] 101
102
NC
MTEST[2] 103
MTEST[3] 104
105
PRST#
106
PSDOUT[1]
SPDIN 107
GND 108
SPSYNC 109
SPSCLK 110
SPMCLKIN 111
SPMCLKOUT 112
INTA# 113
RST# 114
VCC 115
GND 116
PCICLK 117
GNT# 118
REQ# 119
AD31 120
AD30
121
VCC 122
AD29 123
AD28 124
AD27 125
AD26
126
AD25 127
GND 128
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2 9
8
ADC or S/PDIF In
2
S
or
2
I S In
2x24b ch.
2x24b ch.
RDMA1
Q Q
3 6 7 1 3
PCI BUS
M T
VT1720T
.
TX-NR905/NA905
9 4 2 8
SD GPIO
RX1 TX1
I²C/E²PROM 16 pins
MPU-401
PORT GPIO
UART
1 5 0 5 8 2 9 9 4
GND_X1
64
63 VCC_X2
XOUT2
62
XIN2
61
GND_X2
60
59 GPIO7
58 GPIO6
57 GPIO5
56
GPIO4
55
GND
VCC
54
53 GPIO3
52 GPIO2
51 GPIO1
50 GPIO0
49 AD0
48 AD1
47 AD2
46 GND
45 VCC
44 AD3
43 AD4
42 AD5
41 AD6
AD7
40
39 GND
38 VCC
37 CBE0#
36 AD8
m
AD9
35
34 AD10
33 GND
co
9 9
2 8 9 9