Integra DTR-8.8 Service Manual page 156

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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -90
Q216: CY22393FXCT (Clock Generator)
TERMINAL DESCRIPTION
Name
CLKC
V
DD
AGND
XTALIN
XTALOUT
XBUF
LV
DD
CLKD or LCLKD
P–CLK
CLKE or LCLKE
P+ CLK
CLKB or LCLKB
CLKA or LCLKA
GND/LGND
SDAT (S0)
TE
L 13942296513
SCLK (S1)
AV
DD
S2/
SUSPEND
SHUTDOWN/
OE
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Pin Number
1 Configurable clock output C
2 Power supply
3 Analog Ground
4 Reference crystal input or external reference clock input
5 Reference crystal feedback
6 Buffered reference clock output
N/A Low Voltage Clock Output Power Supply
7 Configurable clock output D; LCLKD referenced to LVDD
N/A LV PECL Output
8 Configurable clock output E; LCLKE referenced to LVDD
N/A LV PECL Output
9 Configurable clock output B; LCLKB referenced to LVDD
10 Configurable clock output A; LCLKA referenced to LVDD
11 Ground
12 Two Wire Serial Port Data. S0 value latched during start-up
13 Two Wire Serial Port Clock. S1 value latched during start-up
14 Analog Power Supply
15 General Purpose Input for Fre
Suspend mode control input
16 Places outputs in three-state condition and shuts down chip
when LOW. Optionally, only places outputs in three-state
condition and does not shut down chip when LOW
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Description
Q Q
3 6 7 1 3 1 5
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TX-NR905/NA905
9 4 2 8
0 5 8 2 9 9 4 2 8
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