Rank Sparing - IBM x3850 X6 Planning And Implementation Manual

Figure 2-25 shows how memory mirroring is implemented in Performance mode (left) and
RAS mode (right).
Memory performance mode
+ memory mirroring
Intel Xeon processor
Memory
controller
Memory Memory Memory
buffer buffer
DIMM DIMM DIMM
DIMM DIMM DIMM
DIMM DIMM DIMM
DIMM DIMM
DIMM DIMM
DIMM DIMM
Figure 2-25 Memory mirroring with used with Performance mode (left) and RAS mode (right)
The following memory mirroring rules apply:
The server supports single-socket memory mirroring. The Compute Book memory
channel 0 mirrors memory channel 1, and memory channel 2 mirrors memory channel 3.
This mirroring provides redundancy in memory but reduces the total memory capacity in
half.
DIMMs must be installed in pairs for each Compute Book when using the memory
mirroring feature.
The DIMM population must be identical (size, organization, and so on) for memory
channel 0 and memory channel 1, and identical for memory channel 2 and memory
channel 3.
Memory mirroring reduces the maximum available memory by half of the installed
memory. For example, if the server has 64 GB of installed memory, only 32 GB of
addressable memory is available when memory mirroring is enabled.

Rank sparing

In rank-sparing mode, one rank is held in reserve as a spare of the other ranks in the same
memory channel. There are eight memory channels per processor.
Memory rank sparing provides a degree of redundancy in the memory subsystem, but not to
the extent of mirroring. In contrast to mirroring, sparing leaves more memory for the operating
system. In sparing mode, the trigger for failover is a preset threshold of correctable errors.
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IBM System x3850 X6 and x3950 X6 Planning and Implementation Guide
Memory
controller
Data Data'
Memory
buffer buffer
DIMM
DIMM
DIMM
DIMM DIMM
DIMM DIMM
DIMM DIMM
Mirror
pairs
Memory RAS mode
+ memory mirroring
Intel Xeon processor
Memory
controller
Memory Memory Memory
buffer buffer buffer
DIMM DIMM DIMM
DIMM DIMM DIMM
DIMM DIMM DIMM
DIMM DIMM
DIMM DIMM
DIMM DIMM
Mirror
quads
Memory
controller
Data Data'
Memory
buffer
DIMM
DIMM
DIMM
DIMM DIMM
DIMM DIMM
DIMM DIMM
Lockstep
channel