Temperature Sensors; Integrity Sensor - Advantech MIC-3396 User Manual

6u compactpci 4th generation intel core™ i3/i5/i7 processor blade with ecc support
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3.7.4

Temperature Sensors

Several temperature sensors are supported, either via board populated IC's or Intel
PECI readings from CPU.
Table 3.6: Temperature Sensor List
Sensor Name
CPU-TMP
3.7.5

Integrity Sensor

The Integrity Sensor is an OEM sensor according to the SDR (Sensor Data Record)
definitions in the IPMI specification. It is used to observe the system while operating.
In case of the occurrence of predefined conditions or actions, it throws events. Con-
sequently there are generated entries in the System Event Log. So the user is able to
trace back detailed possible errors or executed actions of the firmware.
The event message contains three bytes of event data. Byte 1 is the IPMI header,
which is a fixed value 0xA0. Byte 2 satisfies the logical component, while byte 3
stands for its action. The table below shows the supported event code structure gen-
erated by the integrity sensors on the MIC-3396.
Table 3.7: Integrity Sensor event data table
Component
BMC FW
FPGA
BIOS
MIC-3396 User Manual
Nominal LNR
LCR
40
-15
-10
Action / Subcomponent
Update
Update
Update
Activation
Manual Rollback
Automatic Rollback
Rollback
Rollback
Graceful Shutdown
Update
Update
Update
Recovery
Update
Update
Update
Flash 0 Boot
Flash 1 Boot
LNC
UNC
-5
80
Result
Byte 1
Successful
0xA0
Timeout
0xA0
Aborted
0xA0
Failed
0xA0
Initiated
0xA0
Initiated
0xA0
Finished
0xA0
Failed
0xA0
Timeout
0xA0
Successful
0xA0
Timeout
0xA0
Aborted
0xA0
Finished
0xA0
Successful
0xA0
Timeout
0xA0
Aborted
0xA0
Failed
0xA0
Failed
0xA0
60
UCR
UNR
90
105
Byte 2
Byte3
0x01
0x00
0x01
0x04
0x01
0x02
0x01
0x21
0x01
0x15
0x01
0x1D
0x01
0x0E
0x01
0x09
0x01
0x74
0x02
0x00
0x02
0x04
0x02
0x02
0x02
0x0E
0x03
0x00
0x03
0x04
0x03
0x02
0x03
0x29
0x03
0x31

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