South Bridge Chipset Configuration - Avalue Technology XTX-PNV User Manual

Table of Contents

Advertisement

XTX-PNV

3.6.6.3 South bridge Chipset configuration

Use the Southbridge chipset configuration menu to configure Southbridge chipset
Item
USB Functions
USB 2.0 Controller [Enabled]
HAD Controller [Enabled]
SMBUS Controller [Enabled]
OnBoard LAN Boot [Disabled]
Advanced Power control
[Disabled]
PCIE Port 0/ 1/ 2/ 3/ 4 [Auto]
PCIE High Priority Port
[Disabled]
PCIE Port 0/ 1/ 2/ 3/ 4 IOxAPIC
Enable [Disabled]
58 XTX-PNV User's Manual
Option
Disables,
2/ 4/ 6/ 8/ 10 USB Ports
Disabled,
Enabled
Disabled,
Enabled
Disabled,
Enabled
Disabled,
Enabled
Disabled
0/ 3/ 6/ 10
Disabled,
Enabled,
Auto
Disabled,
Enabled,
Auto
Disabled,
Enabled
Data Modul AG - www.data-modul.com
Description
Enables the number of desired
ports or disables USB function.
This option is disabled by default.
Enable the Southbridge high
definition audio controller.
This option is enabled by default.
This item helps to set onboard
LAN boot mode.
This option disables access to
Advanced Power control
This section allows selecting
PCIE port 0/ 1/ 2/ 3/ 4 mode.
This item helps to set PCIE high
priority port.
This helps to enable or disable
PCIE port 0/ 1/ 2/ 3/ 4 IOxAPIC.

Advertisement

Table of Contents
loading

Table of Contents