VIA Technologies EPIA-PD Mini-ITX User Manual page 61

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BIOS Setup
Bank Interleave
Set the interleave mode of the SDRAM interface. Interleaving allows banks of
SDRAM to alternate their refresh and access cycles. One bank will undergo
its refresh cycle while another is being accessed. This improves performance
of the SDRAM by masking the refresh time of each bank. This field is only
Disabled, 2 Bank,
available when "DRAM Timing" is set to "Manual". Settings:
4 Bank
Precharge to Active (Trp)
This field controls the length of time it takes to precharge a row in the
memory module before the row becomes active. Longer values are safer but
may not offer the best performance. This field is only available when "DRAM
2T, 3T
Timing" is set to "Manual". Settings:
Active to Precharge (Tras)
This field controls the length of time it a row stays active before precharging.
Longer values are safer but may not offer the best performance. This field is
5T, 6T
only available when "DRAM Timing" is set to "Manual". Settings:
Active to CMD (Trcd)
This field is only available when "DRAM Timing" is set to "Manual". Settings:
2T, 3T
DRAM Command Rate
This field controls how fast the memory controller sends out commands.
Lower setting equals faster command rate. Please note that some memory
2T Command,
modules may not be able to handle lower settings. Settings:
1T Command
DRAM Burst Len
This field sets the length of time for one burst of data during a read/write
4, 8
transaction. Longer settings equals better memory performance. Settings:
DRAM Voltage
2.9V, 2.8V, 2.6V,
This field sets the voltage for the memory module. Settings:
2.5V
53

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