Block Diagram - Atmel ATmega8535L User Manual

Overview

Block Diagram

2502K–AVR–10/06
The ATmega8535 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing instructions in a single clock cycle, the
ATmega8535 achieves throughputs approaching 1 MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
Figure 2. Block Diagram
PA0 - PA7
V
CC
PORTA DRIVERS/BUFFERS
GND PORTA DIGITAL INTERFACE
AVCC
MUX &
ADC
AREF
PROGRAM
COUNTER
PROGRAM
FLASH
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
AVR CPU
PROGRAMMING
LOGIC
+
-
PORTB DIGITAL INTERFACE
PORTB DRIVERS/BUFFERS
PB0 - PB7
PORTC DRIVERS/BUFFERS
PORTC DIGITAL INTERFACE
ADC
TWI
INTERFACE
TIMERS/
STACK
COUNTERS
POINTER
INTERNAL
SRAM
OSCILLATOR
WATCHDOG
GENERAL
TIMER
PURPOSE
REGISTERS
X
MCU CTRL.
Y
& TIMING
Z
INTERRUPT
ALU UNIT
STATUS
EEPROM
REGISTER
SPI USART
COMP.
INTERFACE
PORTD DIGITAL INTERFACE
PORTD DRIVERS/BUFFERS
ATmega8535(L)
PC0 - PC7
OSCILLATOR
XTAL1
OSCILLATOR
XTAL2
RESET
INTERNAL
CALIBRATED
OSCILLATOR
PD0 - PD7
3